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2013 has been a remarkable year for performance improvements in successive-approximation architecture (SAR) analog-to-digital converters (ADCs). While there were a few announcements about new delta-sigma (ΔΣ) and pipeline-architecture ADCs, SARs dominated (see “Only TI Added New Pipeline And ΔΣ ADCs In 2013.”).
The conventional wisdom about ADCs used to say that if circuit designers wanted high resolution, they had to look to the ΔΣ architecture. If designers wanted to look at more rapidly changing data, they had to use a converter built on the SAR architecture. As of 2013, that’s only partly true. The newest ΔΣsstill offer the very highest precision.
If you’re searching for oil reserves out on the patch, for example, Texas Instruments’ ADS1282 will give you 31-bit precision at 4 ksamples/s. (It is, in fact, marketed “for seismic and energy exploration.”) To run at faster rates than that, even the latest ΔΣs must sacrifice resolution. A useful document, “Understanding SAR ADCs: Their Architecture and Comparison with Other ADCs,” from Maxim Integrated noted that some high-bandwidth ΔΣ converters have reached bandwidths of 1 to 2 MHz, but they are limited to 12 to 16 bits of resolution.
If, however, you want to look at higher-frequency data, say for industrial control, robotics, automotive, or instrumentation applications, and you want both precision and high conversion rates, several new SAR ADCs are exhibiting remarkably high precision performance—18 and even 20 bits—and sampling rates from 0.5 to 5 Msamples/s.
Naturally, that’s with zero latency. The data on the output bus represents the voltage on the sample-and-hold right now. So far this year, there have been no fewer than five new SARs in that performance range (see the table). That’s not counting the members of each family that bin out just a little slower or a little bit less precise.
To digitize the voltage on a sample-and-hold circuit, SAR converters compare the sampled input voltage against a series of successively smaller voltages (Fig. 1). Each voltage represents one of the bits in the digital output code. These voltages are fractions of the full-scale input voltage (1/2, 1/4, 1/8, 1/16... 1/2N, where N = number of bits).
The first comparison is made between the analog input voltage and a voltage representing the most significant bit (MSB). If that analog input voltage is greater than the MSB voltage, the value of the MSB is set to 1. If it isn’t greater than the MSB voltage, it’s set to 0.
The second comparison is made between the analog input voltage and a voltage representing the sum of the MSB and the next MSB. The value of the second MSB is then set accordingly. The third comparison is made between the analog input voltage and the voltage representing the sum of the three MSBs. The process repeats until the value of the least significant bit (LSB) is established.
The Latest SAR Lineup
These SAR ADCs began to appear in late May. At that time, Linear Technology announced the highest-precision device of the lot: its no-latency, 20-bit, 1-Msample/s LTC2378-20-1(Fig. 2). The SAR ADC has an internal clock, but it requires external references, which can range from 2.5 to 5.1 V. Normally, it operates from a single 5.5-V supply. For power-critical applications, though, it can be operated down to 2.5 V, where it consumes a maximum of 21 mW. To minimize power consumption, the converter automatically powers down between conversions. The power reduction scales with sampling rate.
Another approach to power reduction is to use the device’s differential input with single-ended signals. For circuit designers who choose this digital gain compression (DGC) on the LTC2378 and other Linear Technology SARs, the first amplifier is configured as a unity gain buffer and the single-ended input signal directly drives the high-impedance input of the amplifier.
DGC requires the full-scale input swing to be limited between 10% and 90% of the ±VRef analog input range. The internal driver then can be powered off a single positive supply. The LTC2378’s data output is serial via a daisy-chainable, SPI-compatible (serial peripheral interface) bus that supports 1.8-, 2.5-, 3.3-, and 5-V logic levels.
At roughly the same time that Linear brought out the LTC2378, Maxim Integrated announced product availability for the MAX11156 (Fig. 3). This 18-bit, no-missing-codes SAR ADC samples at 500 ksamples/s with its reference and reference buffer built in, but still squeezes into a 3- by 3-mm thin dual-inline flat package (TDFN). “No missing codes” implies that as the input voltage is swept over its range, all output code combinations will appear at the converter output.
The tiny package saves at least 70% board space over competing solutions, according to Maxim. The company also notes its “Beyond-the-Rails” technology, meaning it can handle a ±5-V input signal while operating from a single positive 5-V power rail.
Beyond these specs, Maxim touted the ADC’s monotonic transfer characteristic, fast settling time, and lack of latency. Typical dc performance is ±0.5-LSB differential non-linearity (DNL) and ±2.5-LSB integral non-linearity INL. Its ac performance is 94.6-dB signal-to-noise ratio (SNR) and –105-dB total-harmonic distortion (THD). For multichannel applications, multiple devices can be paralleled via its SPI-compatible serial interface. Pricing starts at $16.90.
Later, in September, Linear Technology also introduced its 18-bit, 1-Msample/s, no latency LTC2338-18 ADC with conversion speeds from 250 ksamples/s to 1 Msample/s. Operating from a single 5-V supply, it has a wider (±10.24 V), fully differential, bipolar input range. Its data sheet SNR is 100 dB, and its THD is –110 dB There also is an internal 2.048-V (20 ppm/°C max) reference and reference buffer. An input divider network scales and level shifts the input signal, eliminating complicated circuitry required to directly interface true bipolar signals. I/O is via a SPI bus.
Linear anticipates a pin-compatible 16-bit and 18-bit family with pseudo-differential true bipolar inputs (LTC2328-18). The proprietary internal reference buffer maintains less than 1-LSB error during sudden bursts of conversions, enabling true one-shot operation after lengthy idle periods. These ADCs operate from a single 5-V supply and consume just 50 mW at 1 Msample/s. Power further reduces linearly at slower sample rates. A shutdown mode dissipates only 300 μW when idle.
Supporting the new part, Linear’s DC1908A demonstration board enables easy evaluation of the LTC2338 family in conjunction with the DC590B (QuikEval) or DC718C (PScope) data collection boards. The fully differential LTC2338-18 and pseudo-differential LTC2328-18 families are available in small MSOP-16 packages in commercial, industrial, and automotive temperature grades. Pricing begins at $29.10 in 1000-piece quantities.
Also in September, Analog Devices introduced its 18-bit AD7960 PulSAR ADC with 5-Msample/s throughput (Fig. 4). ADI says the device targets low-power signal chains, multiplexed systems such as digital X-ray, and oversampling applications including spectroscopy, MRI gradient control, and gas chromatography. The AD7960 also achieves its 5-Msamples/s performance while consuming only 39 mW. It boasts ±0.8-LSB INL and (99-dB SNR) at full throughput and a noise floor (22.4 nV/√Hz) relative to full scale.
Meanwhile, ADI’s AD7961 16-bit PulSAR ADC achieves excellent SNR performance (95.5 dB) and INL (±0.2-LSB INL) at 5 Msamples/s. I/O is not via a SPI bus but by means of a 300-MHz, low-noise low-voltage differential signaling (LVDS) interface.
Finally, Texas Instruments launched its 18-bit SAR ADS888 over the summer. The unipolar, no-latency ADC available operates with a 2.5-V to 5-V external reference, which can be higher than the supply voltage, offering a wide selection of signal ranges without additional input signal scaling. The reference voltage setting is independent of, and can exceed, the analog supply voltage.