Power MOSFETs have become increasingly popular for use in numerous high-power applications. But the major drawback of a typical industrial power MOSFET is that it requires a minimum gate threshold voltage of about 4 V (preferably about 8 V for conducting the rated drain current). This makes it difficult to directly interface a power MOSFET to digital logic such as TTL. The circuit presented in this design idea makes it possible to directly interface a power MOSFET to digital logic, including microprocessorbased systems. The circuit doesn’t use any custom MOSFET drivers, transformers, or inductors to boost the voltage to the required level.
The circuit consists of a 555 timer configured as an astable-multivibrator with a frequency around 70 kHz. ON/OFF control of the astable is achieved using the Reset pin (pin 4) as a control input. When the Reset pin of the timer is HIGH it oscillates; when it’s LOW, the oscillations are inhibited. The output of the astable feeds a diode-capacitor voltage doubler consisting of diodes D1 and D2 and capacitors C3 and C4.The output of the voltage doubler is about 8.5 V.
The digital logic control input is interfaced to the timer’s Reset pin through a 4N35 optocoupler. The optocoupler provides isolation between the logic circuit and the high-voltage load circuit. When the digital logic input is HIGH, the input diode of the optocoupler is OFF and its output transistor is also OFF. This pulls the Reset pin of the timer HIGH and it oscillates, generating a voltage of about 8.5 V at the output of the voltage doubler circuit. The output of the optocoupler also feeds the base terminal of the 2N3904 transistor switch, whose collector supply is derived from the voltage doubler output.
The HIGH logic state of the optocoupler output turns the transistor ON. About 8 V is available at the gate terminal of the MOSFET, which is sufficient to turn it ON and allow conduction of the rated drain current through the channel. When the control logic input to the optocoupler is LOW, its input diode conducts and the output transistor is ON. This pulls the Reset pin of the timer LOW, the astable oscillations are inhibited, and the transistor switch is turned OFF. Because there are no oscillations from the timer, the voltage doubler doesn’t generate any voltage. With the transistor switch being OFF, no voltage appears at the MOSFET gate and the device is non-conducting.
Therefore, when the control logic input is HIGH, the MOSFET is ON. When it is LOW, the MOSFET is OFF, accomplishing direct control by the digital logic in the interface circuit. The load in the MOSFET circuit could be a stepper-motor winding, a solenoid coil, etc.
Because the interface circuit doesn’t use any coils or transformers, it avoids EMI problems. Also, since no custom MOSFET driver is used, it’s a low-cost option as well. This interface can find use in many industrial applications.
See associated figure
