Low-Temperature SiGe Processing Advances MEMS Integration

March 15, 2007
It’s possible to integrate MEMS devices above a silicon-based process using silicon germanium (SiGe). Silicon Clocks employs a SiGe low-temperature liquid-phase chemical vapor deposition (LPCVD) process to produce a resonator circuit. The work is ba

It’s possible to integrate MEMS devices above a silicon-based process using silicon germanium (SiGe). Silicon Clocks employs a SiGe low-temperature liquid-phase chemical vapor deposition (LPCVD) process to produce a resonator circuit. The work is based on research done at the University of California at Berkeley.

As a back-of-the line (BOL) process, it enables the vertical stacked integration of MEMS and supporting circuitry. BOL refers to the post-processing of MEMS circuitry on top of other electronics, which is sometimes called a MEMS-last process.

The resulting product features a significant reduction in parasitic effects and an increase in timing circuit performance over a conventional two-chip (i.e., MEMS and signal-conditioning) approach.

The poly-SiGe can be etched very selectively to silicon (Si), SiGe, silicon-dioxide (SiO2), and silicon-nitride (Si3N4) materials in a heated hydrogen-peroxide solution. Consequently, the poly-SiGe can be used as a sacrificial material, eliminating the need to protect the CMOS electronics during the MEMS-release etching step.

This development is useful not only for producing MEMS timing circuits, but also for developing inertial, optical, and RF MEMS ICs. It allows for true 3D IC integration. The use of poly-SiGe is envisioned for many more above-IC applications, such as accelerometers and resonators. Also, wafer-level, thin-film packaging can be done by using SiGe or nitrogen, allowing for truly highly integrated systems.

Working with other industrial partners, IMEC is developing an integrated poly-SiGe MEMS gyroscope with dedicated MEMS and ASIC designs. The gyroscope targets low-noise, high-resolution applications (0.15°/s for a 50-Hz bandwidth). The high-voltage (20-V), 0.35-µm, commercial double-polysilicon CMOS process has five wiring levels and 500-nm silicon-oxide (SiO)/ Si3N4 passivation.

After the deposition and patterning of an etch-stop layer, a thick, undoped sacrificial SiO layer is deposited and panelized. Contacts to the top metal level are etched through the sacrificial layer, the etch-stop layer, and the CMOS passivation.

The poly-SiGe structural layer, which is at least 10 µm thick for increased sensitivity, is deposited by using an advanced multilayer technology. This results in high-quality films at low temperature (≤450°C). The release is done using wet processing and carbon-dioxide (CO2) super-critical drying to eliminate stiction. Thus, free-moving gyroscopes were obtained above fully functioning CMOS.

Though processing of the integrated gyroscopes is finished, packaging and evaluation are still ongoing at the project partner’s site.

About the Author

Roger Allan

Roger Allan is an electronics journalism veteran, and served as Electronic Design's Executive Editor for 15 of those years. He has covered just about every technology beat from semiconductors, components, packaging and power devices, to communications, test and measurement, automotive electronics, robotics, medical electronics, military electronics, robotics, and industrial electronics. His specialties include MEMS and nanoelectronics technologies. He is a contributor to the McGraw Hill Annual Encyclopedia of Science and Technology. He is also a Life Senior Member of the IEEE and holds a BSEE from New York University's School of Engineering and Science. Roger has worked for major electronics magazines besides Electronic Design, including the IEEE Spectrum, Electronics, EDN, Electronic Products, and the British New Scientist. He also has working experience in the electronics industry as a design engineer in filters, power supplies and control systems.

After his retirement from Electronic Design Magazine, He has been extensively contributing articles for Penton’s Electronic Design, Power Electronics Technology, Energy Efficiency and Technology (EE&T) and Microwaves RF Magazine, covering all of the aforementioned electronics segments as well as energy efficiency, harvesting and related technologies. He has also contributed articles to other electronics technology magazines worldwide.

He is a “jack of all trades and a master in leading-edge technologies” like MEMS, nanolectronics, autonomous vehicles, artificial intelligence, military electronics, biometrics, implantable medical devices, and energy harvesting and related technologies.

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