MEMS Meets ASIC

March 15, 2007
Fitting both MEMS and ASICs in a single package can present quite a challenge. The first decision is whether to integrate (merge) them to a single die. This can be expensive both in terms of capital (more complicated process) and yield (fault on either pa

Fitting both MEMS and ASICs in a single package can present quite a challenge. The first decision is whether to integrate (merge) them to a single die. This can be expensive both in terms of capital (more complicated process) and yield (fault on either part means both are lost). Though more costly, the advantage ultimately is a smaller package. A better way is to use a two-die approach, which lets designers test-out bad die and use the latest and smallest ASICs from large CMOS foundries. A choice of packaging also exists to satisfy different requirements, whether it be side by side, flipped, or stacked configurations (see the figures 1, 2, 3, 4).

Each packaging approach has its own benefits. The side-by-side approach is the simplest and the shortest. Current MEMS accelerometers use many of these approaches to achieve products in 3- by 5- by 0.9-mm dual-flat no-lead (DFN) packages.

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