(Image courtesy of Intel).
Intel Lakefield Foveros

Intel to Use Advanced Packaging Prowess to Develop Chips for DoD

Oct. 6, 2020
Intel has been investing in its advanced packaging prowess, including 3-D chip stacking technology, in recent years in a bid to repel rivals in personal computers and data centers as it faces delays in the production of its most advanced chips.

Intel said that it landed the latest phase of a contract to help US Department of Defense to create state-of-the-art chips using its portfolio of advanced packaging technology in the United States.

The Sara Clara, California-based company said it won the second phase of an advanced packaging program called SHIP, for State-of-the-Art Heterogeneous Integration Prototype. Under the latest deal, Intel will create prototypes of advanced chip packages that could be used in aerospace and defense systems. It will also develop interface standards, protocols, and other areas of advanced packaging.

Intel said it would manufacture the chips at its advanced production plants in Oregon and Arizona, where it recently completed more than $7 billion in upgrades to its facility in the city of Chandler.

In advanced packaging, tiny slices of silicon are manufactured separately and then assembled on the same package to act as though they share a single die. That serves to bolster performance while at the same time reducing power. Intel has started to roll out products made from chiplets—interchangeable parts with prepackaged functions—instead of cramming all the same parts into an integrated chip. These slabs of silicon can be based on different production processes, cutting costs.

The push into advanced packaging comes as both the DoD and Congress try to reduce heavy US dependence on Asia for electronic components as well as counter rising competition from China.

Even though Silicon Valley is the cradle of the global semiconductor industry, the US only holds around 10% of the world's overall production capacity for chips. According to industry analysts, more than 80% of the global production capacity is located in China, South Korea, Southeast Asia, and other parts of Asia. Furthermore, the US slipped behind China in total production capacity for the first time last year.

That has deepened concerns at the Defense Department about losing access to the advanced chips used in missiles, rockets, airplanes, radar, ships, satellites, and other aerospace and defense systems.

Intel said that it would give the US Defense Department access to its arsenal of advanced packaging technology, including embedded multi-die interconnect bridge (EMIB), which is used to connect chips placed side-by-side within the same package with high-speed interconnects, and Foveros, which is used to stack computer chips, memory, and other components on top of each other woven together in 3-D. That gives the final product performance on par with all-in-one system-on-chips (SoCs), Intel said.

Intel could also take advantage its Co-EMIB technology, which uses EMIB interconnects to unite 3-D computer chips based on its Foveros technology inside the same package to improve performance.

Intel has been investing heavily in its advanced packaging prowess to repel rivals as it faces delays in the production process for its most advanced chips, where all of the components are crammed on the same tiny square of silicon. Intel said that it has pushed out plans to release central processing units (CPUs) based on its 7-nm node for personal computers to late 2022 or early 2023, a year behind its previous plans. Intel has also delayed production of its 7-nm server chips to the first half of 2023.

Advanced Micro Devices said it is on pace to introduce central processing chips for the data center based on TSMC's 5-nm technology—which is seen as competitive with Intel's 7-nm node—by 2022.

Intel said that the contract with the Department of Defense includes developing chip packages that pair “special-purpose government chips” with a wide range of Intel's commercial silicon, including its CPUs and field programmable gate arrays (FPGAs). Intel said that the combination would give the Pentagon new ways to upgrade mission-critical systems using Intel's US production capabilities.

“Heterogeneous assembly technology is a critical investment for both the DoD and our nation,” said Nicole Petta, principal director of microelectronics for the DoD's Research and Engineering division.

"Intel and the US government share a priority to advance domestic semiconductor manufacturing technology," James Brinker, general manager and senior vice president of Intel's government unit, said. He added the deal would give the US Defense Department access to "Intel’s advanced semiconductor packaging capabilities, diversifying their supply chain and protecting their intellectual property, while also supporting ongoing semiconductor R&D in the US and preserving critical capabilities onshore.”

Intel said it landed the first phase of the advanced packaging program last year. The program is run by the Naval Surface Warfare Center and administered by the National Security Technology Accelerator.

The financial terms of the deal were not disclosed.

Last year, Intel said it also partnered with the Defense Advanced Research Projects Agency (DARPA) to establish standards for assembling chips out of smaller single-purpose semiconductor die, in its Common Heterogeneous Integration and IP Reuse Strategy (CHIPS) program. Intel is working with other industry players to create a library of modular, reusable intellectual property (IP) blocks. Intel has donated its advanced interface bus (AIB), a die-to-die interconnect standard, to the program.

Separately, it also announced a new three-year partnership with Sandia National Labs to research the use of neuromorphic computing modeled on the brain to handle massive computational problems.

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