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SmartNIC Standardizes FPGA Offload

Feb. 24, 2021
Xilinx’s Alveo SN1000 SmartNIC simplifies FPGA-based network acceleration.

Xilinx extended the performance envelope of SmartNICs with its latest Alveo SN1000 SmartNIC (Fig. 1). The card targets the data center and edge-computing platforms with a combination of high-performance networking, a CPU cluster, and a massive FPGA. Basically, the company built a high-performance computing (HPC) platform on a board with significant networking capabilities.

The Alveo SN1000 includes a pair of QSFP28 100-Gb ports. The compute power comes from a 16-core NXP Arm processor with access to 4 GB of DDR4-24000 DRAM. The 16-nm UltraScale+ FPGA offers access to 8 GB of DDR4-24000 DRAM. If for some strange reason the software needs to communicate with a host, there’s a Gen 3, x16 PCI Express (PCIe) interface. Not bad for a full-height, half-length PCIe card that uses only 75 W.

The system is designed to be secure with UEFI secure boot via a hardware root of trust. Remote management is handled by the SMBus or a PCIe-based virtual display manager (VDM). The system also supports Single Root I/O Virtualization (SR-IOV).

The key to this platform is its FPGA, which accelerates network operations (Fig. 2). It can be used for a range of network services.

What makes this platform interesting is the standardization and software framework that facilitates its use—you needn’t deal with programming the FPGA directly. Most will utilize Xilinx or third-party support for a majority of the firmware used in the FPGA and even the software running on the CPU cluster. The latter runs standard Linux distributions like Ubuntu and Yocto Linux. SmartNIC drivers are available for host platforms such as Red Hat Enterprise Linux (RHEL), CentOS, and Ubuntu.

Xilinx significantly expanded the amount of FPGA-based acceleration support that users can select. This includes standard network services like firewalls, routing, and so on. Developers can mix and match custom and standard services as well as utilize third-party solutions.

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William G. Wong | Senior Content Director - Electronic Design and Microwaves & RF

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I earned a Bachelor of Electrical Engineering at the Georgia Institute of Technology and a Masters in Computer Science from Rutgers University. I still do a bit of programming using everything from C and C++ to Rust and Ada/SPARK. I do a bit of PHP programming for Drupal websites. I have posted a few Drupal modules.  

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