Marvell Rolls Out First Flash Controllers to Support PCIe Gen 5
This ElectronicDesign article is reprinted here with permission.
Marvell rolled out the first NVMe SSD controllers for cloud and data centers to support the PCIe Gen 5 interconnect, with improvements in power efficiency, flexibility, security and other areas over its previous generation, giving it the computational power to sit at the heart of flash storage in cloud data centers that will have to deliver more IO operations every second, far higher capacities, and reduced latencies.
The Bravera SC5 processors—part of Marvell’s new Bravera family of SSD and HDD storage processors—are designed for the bandwidth- and performance-hungry servers now in use in huge cloud data centers. The huge amount of data that needs to be processed by AI and real-time analytics in cloud servers and data centers is driving demand for not only higher density but also faster and higher bandwidth storage.
The chips can supply up to 15 Gbps of throughput and 10 million random IO operations every second (IOPS), or double the data rate of the fastest PCIe Gen 4 flash storage. The chips can also deliver up to 10 Gbps while writing data to the flash storage and up to 1 million write IOPS, the company said. That gives the new family of flash controllers a speedup for server workloads and less latency, Marvell said.
These types of chips are small special-purpose processors slapped on SSDs (or HDDs) that are used to communicate with the flash storage when the server CPU needs to read, write, and erase data to it. High performance flash controllers such as Marvell’s Bravera SC5 family are needed to keep up as capacities and data rates in SSDs increase with each generation in the world's largest - "hyperscale" - data centers.
The latest family of flash controllers—MV-SS1300 and the MV-SS1400—support up to 8 or 16 flash memory channels per chip and they also consume up to 8.5 watts (W) to 9.5 W of power, respectively.
Marvell said the chips are ideal for both compute workloads where high throughput and less latency are required and storage workloads where more capacity and security are valued more. These chips not only double the data rate but also have about 40% better power efficiency in total than its previous generation of flash controllers, Marvell said. Latency is also reduced by 30% with its internal data path accelerators.
The Bravera SC5 flash controllers are systems on a chip packing serious compute and special-purpose accelerators. They contain 10 central processing cores, including Arm Cortex-R8, Cortex-M7, and Cortex-M3 cores with integrated SRAM. All the cores are supplemented with a hardware-based SLA enforcer to unload behind-the-scenes chores chores from the CPU, plus DMA controllers and firmware accelerators.
Marvell said the NAND flash controller at the heart of the new product line features its next-generation NANDEdge LDPC engine. The chips support up to 4x PCIe Gen 5 lanes and a dual-port configuration of 2x PCIe lanes per port. Marvell said the chips, packed in 20-mm by 20-mm packages, also incorporate a DDR DRAM memory interface that can be based on DDR4 at 3.2 GHz or LPDDR4X at more than 4.2 GHz.
In terms of security features, the flash controllers also include root-of-trust (RoT) features and a range of cryptography engines, including AES-256, SHA, RSA, and ECC housed in a secure boundary in the silicon.
Marvell is also bringing more flexibility into the fold by designing the Bravera SC5 family to work with the newer NVMe SSD standard from the Open Compute Project (OCP), largely developed by Microsoft and Facebook but is also currently in development from major server manufacturers such as HPE and Dell. These standards expand on the NVMe standard and prescribe all the different features that should be included in SSDs, plus ideal performance, thermal, and power levels required by different form factors.
By giving customers to utilize the same firmware stack and same underlying hardware across product lines, the chips allow customers to design a wide range of SKUs that evolve with server workloads. The SSD flash controllers are the first to support a broader range of architectures, including software-enabled flash (SEF), which adds software flexibility and offloads chores from the CPU to the controller; zoned name spaces (ZNS), where data is saved in large pools in NAND flash; and open channel (OC) SSDs.
Marvell said the new flash controllers can work with any type of 3D NAND flash, including SLC, MLC, TLC, and QLC from any chip vendor, including Micron, Samsung, SK Hynix, Western Digital, and China's YMTC. The Bravura flash controllers also fit any of the leading form factors used in cloud data centers such as (7W) M.2 storage processor cards and (25W) E1.S - or "ruler" - form factor as well as the E1.L, U.2, E3.
More cloud services vendors are also favoring flash storage based on E.1—or “ruler”—form factor that can act as a building block for flash storage used in the largest cloud data centers as a replacement for M.2 slots. All the leading flash memory vendors are already looking at releasing products based on the E.1 form factor, which is slightly longer and wider than the M.2 to accommodate more NAND flash chips increase capacity per drive. It fits vertically in a 1U server chassis, similar to the E1.L.
Both Microsoft and Facebook are pushing the standard to get a better data center form factor with improved flexibility, cooling, and scaling to larger capacities in a compact footprint, while also having better power budgets and signal integrity, and also being future proof to accommodate not only PCIe Gen 4 but also Gen 5. Marvell said its chips can fill up to 16 NAND channels in the E.1 form factor for the first time, up from the limit of eight NAND channels in M.2 slots due to power and thermal constraints.
Many major industry partners have backed Marvell's latest family of flash memory controllers in the cloud data center space, including Advanced Micro Devices, Intel, Facebook, Microsoft, and Renesas.
Thad Omura, vice president of marketing within the Flash Business Unit at Marvell, said that it's working directly with Tier-1 cloud service vendors including Microsoft to build SSDs and custom solutions from 3D NAND vendors. “We’re working with the entire ecosystem to enable SSD vendors and do-it-yourself cloud service providers to deploy the most advanced flash storage solutions,” he added in a statement.
Marvell said that it has started selling the new chips to select customers, which have the ability to use Marvell's in-house firmware or internally design their own custom firmware. The Silicon Valley company expects its clients to announce new products and solutions as central processors and other server chips supporting PCIe Gen 5 are deployed on the market starting in the second half of 2022 and in early 2023.
