This article is part of the TechXchange: RISC-V: The Instruction-Set Alternative
What you’ll learn:
- How the RISC-V ISA will enable the open computing era, fundamentally reshaping the silicon industry just like open-source forever changed the software industry.
- How the RISC-V ecosystem will enable workload-targeted chip design, based on an open specification base that enables industry-wide collaboration to build standards and specifications for commercial competition.
The ongoing chip shortage we’re facing is putting a strain on global suppliers in almost every industry and highlights the ubiquitous nature of chips in all aspects of our lives. This scarcity and supply-chain slowdown has worldwide implications. While there are numerous causes, the COVID pandemic and other supply-chain disruptions also have shown that geographic concentrations of capabilities can be problematic.
IP and silicon that’s not controlled by any one company or country is increasingly important. To address this, many firms are turning to unlicensed and open design architectures and the growing global ecosystem that supports them.
The open standard RISC-V instruction set architecture (ISA) is rewriting silicon industry traditional business practices. Historically, custom silicon was out of reach for all but the biggest companies. Companies that were able to secure custom silicon were constrained by the limits and costs of proprietary processor architectures. However, as silicon requirements have continued to grow in complexity, so has the demand for more design flexibility and freedom.
Open Collaboration
The open RISC-V ISA addressed this with a new approach to silicon processor design: an ISA driven by open collaboration and created with flexibility, extensibility, and scalability in mind. Widely taught, even in the most prestigious universities, RISC-V is truly a global phenomenon, with countries like India and China—along with the European Union—embracing its open standards.
This foundation of open standards makes custom silicon far more accessible. For example, companies and countries aren’t tied to a single IP company for their entire product roadmap and product lifecycle. This increased accessibility is driving new competition as well as creating exciting new opportunities for companies and developers of applications from edge AI to client computing to the data center.
RISC-V is a clean, modern architecture that’s also open, collaborative, and scalable. Firmly established as one of the three major global compute platforms, it stands out from traditional closed, proprietary architectures, and is seeing broad adoption across a wide type of applications.
Attributes of RISC-V
RISC-V has an extremely streamlined base ISA, built from the bottom up to handle the latest compute workloads. It’s vastly different from proprietary architectures that are decades old and burdened with legacy instructions. With RISC-V, designers can customize their offerings by selecting modular, fixed standard extensions or application-specific extensions designed for different workloads. Even with these extensions implemented, solutions still comply with the standard, which avoids fragmentation.
The modular approach of RISC-V helps address the growing demand for specialized cores, such as an IPU, VPU, NPU, or TPU. These cores process huge volumes of data captured from images, video, and voice, and designers can customize their solutions by adding application-specific extensions to these particular architectures.
This enables designers to optimize for different requirements like power, performance, and size to deliver targeted specializations based on the application, customer, or market. Optimizing power consumption is especially critical for customer requirements today, from AI in a battery-operated camera to hyperscalers. RISC-V suppliers can provide significant power savings both in terms of overall power and power per area.
RISC-V also provides community-shared tools and development resources to reduce risk. The shared nature of the RISC-V ecosystem gives companies virtually endless opportunities to build newer, better, and more innovative solutions compared to building entirely in-house. Leveraging the shared ecosystem also enables a faster time to market and reduces the need for an extensive design team.
Unlike closed architectures, RISC-V has a collaborative nature that gives companies the freedom and flexibility to work with each other to solve challenges they may not have been able to address on their own. While the RISC-V community breeds a healthy competition between silicon players, RISC-V also enables organizations and individuals across geographies to join together and collaborate.
Another advantage of RISC-V is its unmatched scalability. RISC-V makes it easy for companies to create heterogeneous multicore complexes using workload-specific architectures for different applications such as AI, Internet of Things (IoT), mobile, storage, and networking, to name a few.
Designers can pick and choose coherent clusters to scale up or down to deliver the perfect mix of processing capabilities. Plus, RISC-V can be easily extended to support new data types, such as bfloat16 for matrix multiplication compute and INT8/INT4 data precision, to deliver performance and efficiency improvements for the rising demands of machine-learning (ML) workloads.
New RISC-V Specs
In 2021, RISC-V International announced the ratification of 16 architecture extension specifications, including Vector, Scalar Cryptography, and Hypervisor that open up new opportunities in AI-powered accelerators, hyperscale data-center processing, client computing, and more.
RISC-V Vectors (RVV) is a hugely valuable technology for AI-powered segments of the silicon industry, an impressive growth opportunity for RISC-V, as legacy architectures aren’t established in the segment. Vector processing offers optimized power for modern workloads to meet the performance requirements of applications today and in the future. Programmability of vector solutions allows designers to solve challenges of complex and inefficient environments, while layering in capabilities like AI and ML.
With RVV, developers can process complex data arrays and scalar operations quickly and with low latency. RISC-V vectors are a powerful and super-efficient (in code size, performance, and area) alternative to the inefficient use of packed-SIMD and GPUs for the processing of large datasets. Due to the simplicity and flexibility of RVV, companies can easily customize RISC-V solutions for many edge-computing applications, from consumer IoT devices to industrial ML applications.
RISC-V has already undergone massive growth across different market segments and geographies—and it’s accelerating. Semico Research forecasts that RISC-V-based AI SoCs will see an impressive 73.6% compound annual growth rate (CAGR) by 2027. For the data-center (servers) market, Semico also estimates that there will be a 98.1% growth rate for RISC-V AI SoCs through 2027. In another performance-driven market, solid-state disks (SSDs), Semico projects 88.5% growth for RISC-V AI SoCs during the same time frame.
RISC-V, with its design freedom and flexibility, is driving exciting innovation and competition within the silicon industry and creating opportunities for companies of all sizes. As the world struggles to right a chip imbalance and countries work to bring more capabilities to their regions, the global RISC-V ecosystem is enabling an explosion of new and innovative technologies and solutions.
Read more articles in the TechXchange: RISC-V: The Instruction-Set Alternative