What you’ll learn:
- Why many commonly held beliefs about 3D flash memory are inaccurate.
- Details about some of the challenges that 3D flash memory faces as it continues to evolve.
- Insights into how adding layers affects performance, cost, production cycle time, and more.
Thirty-five years ago, KIOXIA invented flash memory. Did you know the company conceptualized 3D flash memory as well? It happened at a 2007 IEEE VLSI symposium. Today, 3D flash memory, which utilizes a process that vertically stacks flash-memory cells, has come to dominate the industry.
From smartphones to automobiles, data centers, and more, the demand for more memory storage, higher capacities, and improved performance will continue to grow. That means advances in 3D flash memory will need to keep up.
This article explores 3D flash memory technology, with a focus on the challenges related to its continued evolution. It also illuminates some of the misconceptions surrounding this popular technology, some of which may surprise you.
1. Adding more 3D layers improves performance.
From a performance perspective, there’s no inherent benefit to adding more layers to 3D flash memory. In fact, adding more layers to 3D flash memory increases design complexity.
As additional layers are incorporated, the string of memory cells gets longer, and the challenges of etching a uniform memory hole over the entire depth of layers becomes more difficult. Any inconsistencies in the uniformity from the top layer to the bottom layer can negatively impact the electrical characteristics of the device, which in turn may negatively impact performance.
2. Storage-class memory has no future.
While storage-class memory is still in the early stages of market development, it’s clear that the storage and performance demands of real-time “big data” analysis continue to increase—driven, for example, by edge computing, autonomous-driving learning networks, and artificial intelligence. This is pushing the need for more DRAM for fast-response analysis as well as for more storage in general, which flash supports at lower cost but with less demanding response.
Storage-class memory, such as KIOXIA’s BiCS flash-based XL-FLASH (see figure), bridges the performance gap between DRAM and flash memory. With significantly lower latency than traditional flash memory and much lower cost relative to DRAM, storage-class memory enables new cost-effective storage solutions that support increasing memory storage requirements.
3. Adding more 3D layers reduces production cycle time and improves throughput.
As the memory hole depth increases as more layers are added, it takes longer to etch these memory holes, therefore negatively impacting production cycle time and throughput. Making 3D flash memory with more layers is a longer process, everything else being equal. However, memory suppliers can adopt one of several strategies to try to reduce cycle time, including utilizing different methods to bond the memory-cell array to the CMOS circuit.
4. Adding more layers is the only way to reduce cost per gigabyte.
As layer counts continue to increase, it will diminish the reduction in cost per gigabyte that generally results from adding more layers. Fortunately, there are other ways to reduce cost, including boosting the density per layer by increasing the memory hole density per layer; moving the peripheral circuity, or manufacturing the CMOS circuit in parallel with the memory cell array before being bonded together (CBA); adding more bits per cell, etc. There are a number of different, proprietary ways suppliers can squeeze out costs.
5. Quad-level-cell (QLC) flash memory can’t meet the reliability demands of today’s applications.
The original NAND flash memory was single-level cell (SLC), which stores one bit per cell. Then came the introduction of two bits per cell (multi-level cell, MLC). Though it provided greater storage density and lower cost per bit, there were concerns about whether the reliability would be enough to meet the needs of applications at that time.
As more bits are stored per cell, it typically will negatively impact the write erase endurance. However, improvements were made to the controllers used to manage the flash memory, and MLC became the mainstream solution.
Today, 3D flash memory utilizing three bits per cell (TLC) is the dominant flash-memory solution used in the market, with designers exploiting its high densities and lower cost per bit. Likewise, QLC is in its early stages of growth and, once again, applications that demand high densities and lower cost per bit will take advantage of this new solution. Different applications will weigh cost, density, reliability, power, and performance to find the ideal flash solution for their use case.
6. 3D performance and reliability isn’t as good as 2D floating gate.
3D flash memory employs a different cell architecture than 2D floating gate that improves reliability and performance. 2D floating-gate memory utilizes a trench cell architecture, whereas 3D flash memories typically use a charge trap cell architecture that’s better at reducing the leakage of stored electrons.
For that reason, when 3D flash memory was introduced, primarily supporting TLC, it generally had the same reliability as the floating-gate memory solutions it displaced that supported MLC. Advances in 3D flash memory continue to enable increased performance generation to generation.
7. 3D Flash memory doesn’t support extended temperature ranges.
3D flash memory does, in fact, support extended temperature ranges. Based on application requirements, the general categories of temperatures supported are commercial, industrial, and automotive. Commercial grade is the least stringent and most typically used temperature range, while automotive is the most stringent.
Depending on the type of flash product and application use case, the temperature supported by flash memory can range from 0 to +70°C on one end of the spectrum to –40 to +105°C in the case of automotive.
8. Adding more 3D layers improves reliability and improves yields
For the same reasons that can negatively impact performance when additional layers are added, they also can affect reliability and yields. As more layers are added, NAND flash vendors must overcome these design and manufacturing challenges at each generation, which will continue to become more challenging as layer counts increase.
9. All 3D NAND flash is similar.
A variety of 3D flash memories are well-suited for multiple uses cases and applications. While a range of flash-memory solutions support different temperature ranges, different types of 3D flash memory support different levels of reliability and performance.
Often tradeoffs occur when optimizing flash-memory designs to enhance reliability, performance, power, or cost. This is why, for example, we see different flash-memory products or SSD solutions to support client, data-center, or enterprise markets.
10. 3D flash memory will completely replace 2D floating-gate memory.
While 3D flash memory has clearly become today’s dominant flash-memory architecture, certain applications still use legacy 2D floating-gate flash memory. For example, applications that only need small densities of flash might use SLC flash memory supporting densities such as 1, 2, or 4 Gb of flash. Or applications that might only need 4 or 8 GB of MLC floating-gate-based eMMC.
On the other hand, the latest generations of 3D flash memory are typically produced in die densities of 256 or 512 Gb, or more, to achieve the best cost per gigabyte based on how they’re designed and manufactured. The minimum die density supported will likely increase in future generations of 3D flash. This means that a whole range of flash-memory generations continue to be in demand based on uses cases and density requirements.
11. At each generation, it’s always best to have more layers.
The optimum number of layers at each generation may be different for each supplier. This is why we see some suppliers have, say, 64 layers vs. 72 layers, or 92 layers vs. 96 layers. And we’ll likely see more variety as the layer counts rise.
Though each new layer adds incremental costs, it also boosts density per wafer, which has a positive impact on the bottom line. Since the capital costs for each new generation of 3D flash memory are significantly higher than that of 2D floating gate, suppliers also need to consider how to squeeze the most out of each generation with the least amount of additional capital investment. For this reason, the optimum layer count can vary between suppliers at each generation.