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DDR5 Server Memory Now Fully Validated for Xeon Processors

March 1, 2023
DDR5 technology looks to improve every aspect of performance for Intel’s Xeon family.

What you’ll learn

  • What DDR5 was designed to do.
  • Who is using DDR5?
  • How Micron’s DDR5 was developed.

Micron recently announced that its DDR5 server memory has been fully validated for use with Intel's Xeon Scalable processor family (Fig. 1). The memory is designed to increase performance and reliability for the 4th-generation family. The technology offers several benefits compared to previous DDR generations, including higher memory speeds, increased memory density, improved power efficiency, and enhanced error-correction capabilities.

The higher memory speeds enabled by DDR5 technology can improve system performance, while the upgraded reliability and error correction help ensure stability and uptime for critical applications. Due to these features, DDR5 memory is well-suited for high-performance computing, data centers, and other demanding applications.

ECC Functionality

Micron's DDR5 is an error-correction-code (ECC) variant, meaning it eliminates single-digit error codes before they’re sent to the CPU or GPU. In standard memory modules, when data is stored, it’s written to a specific memory cell. When the data is read from that cell, it’s compared to the original data written to ensure that it was stored correctly. If an error is detected, the system will not know which cell contains the error and will be unable to correct it.

With ECC memory, an additional memory chip is included on the module to detect and correct errors. When data is written to the memory cell, additional redundant bits also are written to the ECC chip. When the data is read, the ECC chip compares the stored data to the redundant bits and can correct single-bit errors. If multiple-bit errors are detected, the system will report a memory error, which can help identify faulty hardware or software.

Micron's DDR5 memory modules also incorporate an ECS feature where the device will correct data when a single-bit error occurs. This can run automatically or manually within 24 hours and will generate a report on the number of errors that have been corrected.

The DDR Effect

To that end, Intel's 4th-gen Xeon processors can take advantage of Micron's new memory offerings throughout its lifecycle by exploiting the processors' increased throughput and performance (Fig. 2). The latest Xeon line features a new microarchitecture with more cores, improved cache hierarchy, and faster interconnects, significantly boosting performance for data-intensive workloads. They also support Intel Optane persistent memory, which can increase memory capacity and performance.

Codenamed Sapphire Rapids, the processors offer advanced security features such as Intel SGX (Software Guard Extensions) and Intel TME (Total Memory Encryption), which help protect data and applications from various threats. Furthermore, enhanced AI and machine-learning performance capabilities are included through new instructions and optimized libraries. Thus, they can be utilized for more than just data center and server applications, including cloud computing, data analytics, edge computing, and more.

Q&A

Micron's DDR5 memory modules and Intel's Xeon line are currently available. We were lucky enough to ask Micron for more information about its current DDR5 lineup and what's available for the future.

While the memory throughput over DDR4 is much faster, it also generates increased heat. Are the temperature differences negligible, and if not, how does that increased heat factor in a server environment that's usually hot already?

Overall, DDR5 operates under lesser voltage compared to DDR4, but all OEMs have heat factored into their designs.

Beyond validation, what does Micron's DDR5 solution bring to the table over other manufacturers such as Samsung and Hynix?

Micron has played a pivotal role in JEDEC's creation of DDR5 memory specifications and was one of the first to sample DDR5 to customers. Micron's Technology Enablement Program (TEP), the first of its kind in the industry, gave system designers early access to key internal resources to assist their DDR5 validation and qualification processes.

Will Micron's DDR5 solution be able to handle the lifespan of Intel's 4th-gen Intel Xeon Scalable processors without bottlenecking, and are there plans in place for DDR6?

Yes, Micron's DDR5 is supported throughout the lifespan of Intel's 4th-gen Xeon processors. We’re currently in the first phase in terms of speeds with DDR5 for servers, with two more planned updates between now and the sunset or phase out to DDR6. The first generation of speed is 4,800, and we will ramp it up to 5,600, then 6,400, and 8,800 over the next few years.

What troubles did/do you have developing this platform, and how did you overcome them?

Micron increased our validation efforts for the DDR5 to be in most platforms in time for launch in all three capacity categories: 16, 32, and 64 GB. Based on the demand from cloud service providers, we were also validating non-binary sizes at the same time in 24-, 48-, and 96-GB capacities. In addition, within Micron, we were migrating production into an advanced node for manufacturing.

We solved this by re-prioritizing our efforts, transitioning DDR5 to an advanced node to ensure they’re available to newer server platforms coming in later this year and next year. We focused on prioritizing mobile and client and creating those products. Then, we focused on validating traditional sizes for our mainstream, and now we’re in the process of validating non-binary sizes.

About the Author

Cabe Atwell | Technology Editor, Electronic Design

Cabe is a Technology Editor for Electronic Design. 

Engineer, Machinist, Maker, Writer. A graduate Electrical Engineer actively plying his expertise in the industry and at his company, Gunhead. When not designing/building, he creates a steady torrent of projects and content in the media world. Many of his projects and articles are online at element14 & SolidSmack, industry-focused work at EETimes & EDN, and offbeat articles at Make Magazine. Currently, you can find him hosting webinars and contributing to Electronic Design and Machine Design.

Cabe is an electrical engineer, design consultant and author with 25 years’ experience. His most recent book is “Essential 555 IC: Design, Configure, and Create Clever Circuits

Cabe writes the Engineering on Friday blog on Electronic Design. 

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