Graphical Code Coverage Tool Speeds Design Debugging

Code Snooper, a code coverage software tool for use with the Active-HDL design and verification environment is integrated with the Active-HDL simulation kernel and does not require additional compilations like other code coverage tools, consequently saving time for designers. Since Code Snooper can be run in parallel with simulation, it provides on-line analysis of code efficiency and testing quality. The code coverage tool checks for execution of all VHDL and Verilog statements during simulation and provides a detailed report indicating which parts of source code were not covered by the testbench and which VHDL or Verilog statements were not executed. Code Snooper is included at no cost in the Expert Edition of Active-HDL. The Standard and Plus Editions of Active-HDL include HDL, State Machine, and Block Diagram & Editors; Automatic Testbench Generation; Waveform Viewer/Editor; choice of VHDL, Verilog or mixed VHDL/Verilog/EDIF simulation and they offer Code Snooper as an add on option at $3,500. To request a free evaluation copy of Active-HDL and Code Snooper, contact ALDEC INC., (800) 487-8743.