Build an improved, simpler finite state machine

The two improvements suggested here pertain to the “Build a Simple Finite State Machine” Idea for Design submitted by Giovanni Romeo (ELECTRONIC DESIGN, July 7, 1997, p. 149). First of all, the schematic doesn’t show a register latch on the EPROM inputs. The outputs of a 27C256 EPROM will exhibit glitches during transitions of the inputs. With the free-running clock shown in the schematic, the output register will occasionally catch these glitches. This causes state-machine failures if the inputs aren’t synchronized to the clock.

Secondly, there doesn’t seem to be much reason for this application to invent a state machine language as described in the text. The following C code implements the function described in the article (see the listing). The code is simpler to understand, and took less than an hour to write and debug. It was compiled under Borland C 3.1.