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    1. Technologies
    2. Embedded

    Multimedia Processor Delivers 3D Graphics, Security, And More

    July 21, 2005
    The i.MX31 multimedia processor delivers nearly 1 million-polygon/s 3D graphics for low-power portable media appliances. Developed by Freescale Semiconductor, it's based on an ARM1136JF-S processor core with 16-kbyte data and instruction caches and
    Dave Bursky

    The i.MX31 multimedia processor delivers nearly 1 million-polygon/s 3D graphics for low-power portable media appliances. Developed by Freescale Semiconductor, it's based on an ARM1136JF-S processor core with 16-kbyte data and instruction caches and a 128-kbyte unified L2 cache. Its dedicated engines target vector math, 3D graphics, MPEG-4 encode, image processing, and Java execution.

    Freescale's Smart Speed power-management technology keeps the total power consumption to less than 50 mW when running at internal clock rates of up to 532 MHz and just a milliwatt or two on standby. Also, its multiple low-power modes provide lots of flexibility. A six- by five-port crossbar switch accelerates data movement between blocks, nearly eliminating processor wait states and permitting a high degree of parallelism.

    The embedded 3D graphics engine and image-processing unit deliver up to 32 bits/pixel and VGA resolution at up to 30 frames/s for good motion quality. Based on the ARM MBX R-S graphics accelerator, the graphics processor provides full-scene anti-aliasing and Open-GL ES and Java Mobile 3-D support. The engine offers an impressive 1 Mtriangle/s (double textured, bi-linear, Gouraud shaded) at an effective data rate of about 100 Mpixels/s.

    The chip's MPEG-4 hardware encoder can encode MPEG-4 SP and H.263 baseline formats. It supports resolutions up to VGA at 30 frames/s. A mix of hardware and software supports additional multimedia decoding for popular codecs (H.264, MPEG-4, and many others), minimizing the loading on the ARM processor. Image-processing support lets users preview images captured by CMOS or CCD sensors.

    A random-number generator accelerator and electronic fuses enable vendors to hardwire device IDs, security codes, and other data into a secure region on the chip. A run-time integrity checker (including a SHA-1 algorithm accelerator), tamper detection, a secure JTAG controller, and other features protect the system from malicious service attacks and help block illegal access to licensed content.

    The i.MX31 includes multiple I/O support options. A high-speed (480-Mbit/s) USB On-The-Go port provides system-to-system connectivity without a PC. A USB 2.0 host port interfaces with peripherals such as Wi-Fi, Bluetooth, and other wireless links.

    Expansion interfaces include support for SDRAM, mobile DDR, NAND flash, and PSRAM as well as two MMC/SD card ports, a PCMCIA/CF interface, two memory-stick Pro ports, and support for SIM cards and an ATA hard-disk drive. Communication ports include multiple UARTs, dual SPI ports, two SSI/I2S ports, an IrDA port, and an audio multiplexer.

    The i.MX31 is housed in a 457-ball, 0.5-mm pitch BGA package. It costs about $20 in lots of 10,000. The i.MX31L, which costs slightly less, eliminates the graphics coprocessor for systems that have their own graphics engine. Samples are immediately available.

    See associated figure

    Freescale Semiconductor Inc.www.freescale.com

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