IC Compiler Unifies Operations

April 4, 2005
Distinguishing itself from current generation tools, the Galaxy IC Compiler unifies previously separate operations and claims to be the first to provide concurrent physical synthesis, clock tree synthesis, routing, yield optimization, and sign-off

Distinguishing itself from current generation tools, the Galaxy IC Compiler unifies previously separate operations and claims to be the first to provide concurrent physical synthesis, clock tree synthesis, routing, yield optimization, and sign-off correlation. According to the company, the compiler employs a next-generation architecture that solves multiple design problems concurrently, thereby boosting productivity. Said to be a key innovation in IC Compiler, extended physical synthesis (XPS) technology extends physical synthesis to full place and route, which eliminates the barriers between placement, clock tree, and routing. With availability expected in June, price for a one-year subscription license is $735,000. SYNOPSYS INC., Mountain View, CA. (800) 541-7737.

Company: SYNOPSYS INC.

Product URL: Click here for more information

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