FPGA Tools Upgrade Aids Logic Optimization

Jan. 21, 2002
Synplicity's upgrade to its Amplify Physical Optimizer software and Synplify Pro logic synthesis tool, Amplify 3.0, is a physical synthesis tool for FPGAs. It has been augmented by Synplicity's Total Optimization Physical Synthesis (TOPS) technology....

Synplicity's upgrade to its Amplify Physical Optimizer software and Synplify Pro logic synthesis tool, Amplify 3.0, is a physical synthesis tool for FPGAs. It has been augmented by Synplicity's Total Optimization Physical Synthesis (TOPS) technology. TOPS is based on algorithms that produce precise physical placement while performing physical optimization of logic on critical paths. TOPS can achieve even more predictable timing estimations, reducing the number of iterations required to make timing closure.

Amplify 3.0 now performs detailed placement for critical regions, which gets passed into the back end, where a place-and-route tool finishes up. Synplicity claims that performance gains average 10% compared with earlier versions.

Other features include BlockRAM support with automatic design-rule checking, floating-region support for Altera APEX devices, an automated pin-assignment user interface, and new support for Altera APEX II, Mercury, and Xilinx Virtex II devices.

Synplify Pro, now available as version 7.0, has added a number of features, most notably an automated register retiming capability for Altera users. This provides more balanced delays in the combinatorial logic between registers, which results in significant performance gains.

The Amplify Physical Optimizer tool with TOPS technology is available now as an option to the Synplify Pro logic synthesis tool. It starts at $25,000. Synplify Pro 7.0 starts at $19,000. It too is available now.

Synplicity Inc., (408) 215-6000; www.synplicity.com.

About the Author

David Maliniak | MWRF Executive Editor

In his long career in the B2B electronics-industry media, David Maliniak has held editorial roles as both generalist and specialist. As Components Editor and, later, as Editor in Chief of EE Product News, David gained breadth of experience in covering the industry at large. In serving as EDA/Test and Measurement Technology Editor at Electronic Design, he developed deep insight into those complex areas of technology. Most recently, David worked in technical marketing communications at Teledyne LeCroy. David earned a B.A. in journalism at New York University.

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