CPLD And FPGA Families Add New Members

Dec. 1, 2004
Adding to the CoolRunner-II CPLD family, the XC2C32A and XC2C64A debut in smaller MLF packages than their predecessors and integrate an additional I/O bank to support voltage level translation and device interfacing. They are available in 32 and 64

Adding to the CoolRunner-II CPLD family, the XC2C32A and XC2C64A debut in smaller MLF packages than their predecessors and integrate an additional I/O bank to support voltage level translation and device interfacing. They are available in 32 and 64 macro-cell densities, respectively, and are suitable for use with interfacing busses and devices that use varying voltages and standards. Additionally, the CPLDs are available as lead-free devices. Prices for the XC2C32A and XC2C64A are $0.85 and $1.20 each/250,000, respectively. The company has also announced the industry’s lowest power FPGAs, which are additions to the Spartan-3L family. These devices rely on refined 90-nm technology and a unique hibernation mode to deliver quiescent-power reductions up to 98%. The hibernate mode offers two levels of power reduction: standby mode allowing up to 68% lower power and active power management mode for up to 98% lower power. In active power management mode, the 1M-gate XC3S1000L and 1.5M-gate XC3S1500L consume less than 6 mA and 8 mA, respectively. Prices for the XC3S1000L and XC3S1500L are under $14 and $22 each/250,000, respectively. XILINX INC., San Jose, CA. (408) 559-7778.

Company: XILINX INC.

Product URL: Click here for more information

About the Author

Staff

Articles, galleries, and recent work by members of Electronic Design's editorial staff.

Sponsored Recommendations

Comments

To join the conversation, and become an exclusive member of Electronic Design, create an account today!