IDE Enhances Synthesis For Next-Generation FPGA Designs

April 14, 2003
Targeted for the design and development of Actel's FPGA families, the Libero 2.3 integrated development environment (IDE) upgrades the synthesis and place-and-route tools from Synplicity and Actel, respectively. The Libero environment streamlines...

Targeted for the design and development of Actel's FPGA families, the Libero 2.3 integrated development environment (IDE) upgrades the synthesis and place-and-route tools from Synplicity and Actel, respectively. The Libero environment streamlines the design flow, manages all design and report files, and passes necessary design data between tools. The IDE includes FlashLock support for flash-based ProASIC Plus devices. Added SmartPower capabilities and enhanced Designer R1-2003 software round out the IDE. Incorporated is Synplicity's Synplify 7.2 software, which offers improved correlation between synthesis and post-layout timing results and carry-chain support for Axcelerator products. Also present within the package are updated versions of SynaptiCAD WaveFormer Lite and Mentor Graphics' ModelSim. The Libero 2.3 IDE is available in three editions: Platinum, Gold, and Silver. Pricing begins at $995.

Actel Corp.
www.actel.com; (888) 99-ACTEL

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