Hybrid Devices Meld ASIC And FPGA Features

Designed to combine the performance of ASICs with the flexibility of FPGAs, AccelArray devices are said to shorten design and fabrication cycle times for typical standard cell ASICs by as much as 50% and reduce development costs for products built in 0.11 micron process lines by as much as 80%. AccelArray devices can support a 333-MHz core system frequency, 800-MHz analog PLL capability, and densities reportedly 20 times that for typical FPGAs. And customers are said to be able to complete design and prototyping activities in just eight weeks. AccelArray is targeting telecomm, storage and industrial automation markets. FUJITSU MICROELECTRONICS AMERICA, Sunnyvale, CA. (408) 737-5647.