Thanks to new compiler technology, Altium’s Designer product development system simultaneously generates both highly optimized executable code and hardware for implementation in FPGAs from standard C code. The tool is based on Altium’s Viper ANSI/ISO C-compiler platform.
In addition to the target executable code and FPGA hardware implementations, the system also generates all required code to link the two together at runtime. Initial applications for this compiler technology will allow embedded-system engineers who use the Altium Designer suite to accelerate applications by automatically and transparently offloading selected C-code functions from the processor into FPGA hardware. The system automatically generates hardware within the FPGA to execute those functions, and compiles the remaining software to make use of that hardware.
The unified compiler technology, combined with Altium Designer’s hardware- and software-level portability between processors, allows developers to make crucial architectural decisions later in the design process. These decisions can come after the application requirements are more specifically known.
By moving selected functions to concurrent hardware in FPGAs, designers can avoid the need to use a faster processor or run the system at higher clock speeds. Execution speed can be improved by transparently offloading processor-intensive functions into dedicated hardware.
A major benefit of the unified compiler is the ability to quickly and easily try out various code-implementation options without having to manually re-engineer the system hardware, or sacrifice portability by moving functions to assembly code.
The unified hardware/software compiler technology is available as part of Altium Designer v6.0 as part of a software update scheduled for release later in this quarter. Contact Altium directly for pricing information.
For further details, visit http://www.altium.com/contacts