Not all companies
have $10 million in
their back pockets for the non-recurring expenses (NRE) today's ASIC design starts require. Fortunately, that kind of cash isn't necessary anymore, thanks to Lattice
Semiconductor's latest line of FPGAs. In fact, the company's FreedomChip methodology offers an affordable
path to high volume with a 30% to 75%
price reduction path ().
Start with the ExtremePerformance LatticeSC or LatticeSCM (LatticeSC/M)
device. Then, using the new model, convert to a pin-compatible FreedomChip
device that includes your original design,
along with scan logic and other dedicated
silicon for testing purposes.
Finally, Lattice applies industry-standard ASIC techniques to comprehensively
test the original design to ensure compliance. The result is your original netlist
being implemented in a low-cost and custom-tested silicon with a typical fault coverage of over 99%.
Still not convinced? What if all of your
I/O and block-level functions such as
macro blocks, serializer/deserializer, and
memory remained user-configurable and
programmable after the conversion
process? Most ASICs aren't designed with this sort of flexibility
designed in to allow future
tweaking of design parameters without a redesign.
LatticeSC/M devices
were released to volume
production last month and
come with lookup-table
sizes of 25k in a 1020-ball
flip-chip ball-grid-array (FCBGA) package to 115k in a 1704-ball FCBGA
package. The devices are based on 90-nm
process technology, and the FreedomChip
model supports all speed grades.
The only requirement to use the FreedomChip devices is to start with LatticeSC/M devices manufactured in flip-chip packages. After you have stabilized
your design and are satisfied it is ready
for mass production, FreedomChip
equivalents can be ordered from Lattice
with a minimum quantity ranging from as
low as 1200 to 3600 pieces (depending
on device density) with delivery in 12
weeks or less.
There is no added cost for the FreedomChip design methodology, as it is
included with Lattice's ispLEVER tool
suite. Lattice is asking a per-design NRE
of $75,000, which is up to $9,925,000
off the NRE for an ASIC.
Lattice Semiconductor
www.latticesemi.com
