Low-Power SERDES FPGAs Save Power

March 12, 2009

Lattice Semiconductor’s LatticeECP3 FPGAs target the midrange sweet spot needing high-speed serializers/deserializers (SERDES). The 65-nm FPGAs deliver 3.2-Gbit/s SERDES with XAUI jitter compliance. The SERDES are grouped in blocks of fo

William G. Wong

Lattice Semiconductor’s LatticeECP3 FPGAs target the midrange sweet spot needing high-speed serializers/deserializers (SERDES). The 65-nm FPGAs deliver 3.2-Gbit/s SERDES with XAUI jitter compliance. The SERDES are grouped in blocks of four, but they can handle independent protocols including PCI Express, CPRI, OBSAI, XAUI, Serial RapidIO, and Gigabit Ethernet. The chips are designed for communication chores and include up to 7 Mbits of on-chip RAM plus 800-Mbit/s DDR3 support with built-in read/write leveling. The 1-Gbit/s low-voltage differential signaling (LVDS) I/O incorporates input delay blocks, allowing direct connection to high-performance analog-to-digital converters (ADCs) and digital-to-analog converters (DACs). The 500-MHz, 36-by-36 multipliers can be cascaded with 54-bit arithmetic logic units (ALUs) utilizing only more efficient hard-core logic. Lattice Semiconductor’s Simultaneous Switching Output (SSO) Design Planner augments the updated ispLever IDE. The LatticeECP3-70 with 67k lookup tables (LUTs) and a dozen SERDES costs $35.

LATTICE SEMICONDUCTOR

About the Author

William G. Wong | Senior Content Director - Electronic Design and Microwaves & RF

I am Editor of Electronic Design focusing on embedded, software, and systems. As Senior Content Director, I also manage Microwaves & RF and I work with a great team of editors to provide engineers, programmers, developers and technical managers with interesting and useful articles and videos on a regular basis. Check out our free newsletters to see the latest content.

You can send press releases for new products for possible coverage on the website. I am also interested in receiving contributed articles for publishing on our website. Use our template and send to me along with a signed release form.

Check out my blog, AltEmbedded on Electronic Design, as well as his latest articles on this site that are listed below.

You can visit my social media via these links:

I earned a Bachelor of Electrical Engineering at the Georgia Institute of Technology and a Masters in Computer Science from Rutgers University. I still do a bit of programming using everything from C and C++ to Rust and Ada/SPARK. I do a bit of PHP programming for Drupal websites. I have posted a few Drupal modules.

I still get a hand on software and electronic hardware. Some of this can be found on our Kit Close-Up video series. You can also see me on many of our TechXchange Talk videos. I am interested in a range of projects from robotics to artificial intelligence.