DIL Package Packs 16 Mbits Of SRAM

Providing four times the density of the latest generation of monolithic SRAM devices, these 16-Mbit modules come in dual-in-line (DIL) packages that conform to the standard 36-pin Jedec footprint with center power and ground pins. Designed to emulate future generations of 16-Mbit monolithic SRAMs, SYS82000FKX module is organized as 2M x 8 bits wide and features access times of 20 to 120 ns. A second module, the SYS82000FKXA, utilizes the exact same construction and organization as the former device, but has the industry standard evolutionary pinout. It also spans access times of 20 to 120 ns.