Digital ICs/DSPs: Programmable Clock Chips Allow In-System Configuration

July 5, 2004

The VersaTime clock family offers a complete portfolio of programmable skew and zero-delay buffers with nonvolatile programming capability, enabling customers to consolidate multiple dedicated fixed-function clocks into one clock chip. The VersaTime programmable clocks don't compromise on jitter performance—cycle-to-cycle jitter is less than 75 ps p-p (max value with outputs at the same level) and 100 ps p-p (max value with outputs at different levels). The 5T9820 is a 2:10 zero-delay buffer with single-ended outputs. The 9821 is a 2:6 zero-delay buffer with complementary outputs. The '9890 is a 2:10 programmable-skew buffer with single-ended outputs. And, the 9891 is a 2:6 programmable-skew buffer with complementary outputs. Prices for the clocks start at $2.95 each in 10,000-unit lots.

IDT Inc. www.idt.com

About the Author

Dave Bursky | Technologist

Dave Bursky, the founder of New Ideas in Communications, a publication website featuring the blog column Chipnastics – the Art and Science of Chip Design. He is also president of PRN Engineering, a technical writing and market consulting company. Prior to these organizations, he spent about a dozen years as a contributing editor to Chip Design magazine. Concurrent with Chip Design, he was also the technical editorial manager at Maxim Integrated Products, and prior to Maxim, Dave spent over 35 years working as an engineer for the U.S. Army Electronics Command and an editor with Electronic Design Magazine.