Digital ICs/DSP: Antifuse-Based FPGAs Offer Military-Qualified Versions

Dec. 18, 2003
The high-performance nonvolatile Axcelerator family of FPGAs has been qualified to military specifications. Built upon the company's AX architecture, the antifuse-based FPGAs deliver better than 500-MHz internal operation and up to 100% resource...

The high-performance nonvolatile Axcelerator family of FPGAs has been qualified to military specifications. Built upon the company's AX architecture, the antifuse-based FPGAs deliver better than 500-MHz internal operation and up to 100% resource utilization. They're available with densities of up to 2 million system gates, up to 640 I/O pads, and up to 288 kbits of memory. The devices offer levels of design security that enable designers to safeguard against overbuilding, cloning, reverse engineering, and denial of service. The AX2000, AX1000, AX500, and AX250 are now available in three packaging and screening options: military-temperature plastic (MTP), military-temperature hermetic (MTH), and hermetic packaging fully screened to MIL-STD 883 class B (883B). In 5000-unit quantities, prices start at $260 each for the MTP devices, $430 each for the MTH units, and $770 each for the 883B devices.

Actel Corp.www.actel.com; (888) 992-2835
About the Author

Dave Bursky | Technologist

Dave Bursky, the founder of New Ideas in Communications, a publication website featuring the blog column Chipnastics – the Art and Science of Chip Design. He is also president of PRN Engineering, a technical writing and market consulting company. Prior to these organizations, he spent about a dozen years as a contributing editor to Chip Design magazine. Concurrent with Chip Design, he was also the technical editorial manager at Maxim Integrated Products, and prior to Maxim, Dave spent over 35 years working as an engineer for the U.S. Army Electronics Command and an editor with Electronic Design Magazine.

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