Single Chip-Scale Package Houses Five Memory Chips

July 1, 2002
In a single chip-scale package (CSP) measuring only 1.4-mm in thickness, the company has managed to stack a PSRAM, one SRAM, and two flash memory chips, plus a spacer chip. Employing a proprietary process, the CSP is designed and simulated for thermal

In a single chip-scale package (CSP) measuring only 1.4-mm in thickness, the company has managed to stack a PSRAM, one SRAM, and two flash memory chips, plus a spacer chip. Employing a proprietary process, the CSP is designed and simulated for thermal and mechanical reliability, as well as to ensure predictable performance. The device targets applications where high memory capacity is needed in a compact design, such as DSPs and ASICs assembled with a controller and stacked memory. In addition, the company has under development a six-chip CSP with the same profile and a 75-µm thick die. For more details, call CHIPPAC INC., Fremont, CA. (510) 979-8220.

Company: CHIPPAC INC.

Product URL: Click here for more information

Sponsored Recommendations

The Importance of PCB Design in Consumer Products

April 25, 2024
Explore the importance of PCB design and how Fusion 360 can help your team react to evolving consumer demands.

PCB Design Mastery for Assembly & Fabrication

April 25, 2024
This guide explores PCB circuit board design, focusing on both Design For Assembly (DFA) and Design For Fabrication (DFab) perspectives.

What is Design Rule Checking in PCBs?

April 25, 2024
Explore the importance of Design Rule Checking (DRC) in manufacturing and how Autodesk Fusion 360 enhances the process.

Unlocking the Power of IoT Integration for Elevated PCB Designs

April 25, 2024
What does it take to add IoT into your product? What advantages does IoT have in PCB related projects? Read to find answers to your IoT design questions.

Comments

To join the conversation, and become an exclusive member of Electronic Design, create an account today!