Drop-In Solution Takes Place Of FPGAs

Dec. 1, 2004
To reduce costs and remain competitive in today's market, many engineering companies are relying on field-programmable-gate-array (FPGA) conversions. Now, they have another choice in the XPressArray-II (XPA-II) product from AMI Semiconductor. The...

To reduce costs and remain competitive in today's market, many engineering companies are relying on field-programmable-gate-array (FPGA) conversions. Now, they have another choice in the XPressArray-II (XPA-II) product from AMI Semiconductor. The 1.5-V/1.2-V XPA-II product is a drop-in, pin-for-pin replacement for current-generation FPGAs. It claims to offer high performance, low power, and low cost. It also promises low non-recurring-engineering (NRE) costs and accelerated manufacturing cycle times, which make it well suited for mid-density application-specific-integrated-circuit (ASIC) design. The solution targets applications like wireless and wired networking infrastructure, storage systems, printers, medical ultrasound/imaging systems, and military/aerospace communications.

Based on single-cycle, 18-×-18-b multiplier performance for DSP applications, the XPA-II platform supports densities of up to 3.9 million ASIC gates, delay-locked loops (DLLs), and phase-locked loops (PLLs). In addition, it supports local clock speeds of up to 500 MHz and system clock speeds of up to 210 MHz. To answer many designers' calls for flexible and high-density memories, the XPA-II platform includes 18-Kb initializable, dual-port RAM blocks. These blocks can be configured to provide a total of 415 Kb to 5.6 Mb of block and distributed memory.

To provide further flexibility, the product's I/O technology includes fully configurable signal, core, and I/O power-supply pad locations. It also provides support for a wide range of I/O standards including the following: PCI, PCI-X, Mode 1 and Mode 2, GTL, HSTL, SSTL, and LVPECL. The I/O technology flaunts a double-data-rate (DDR) memory interface and 1-Gbps low-voltage differential signaling (LVDS). Because the platform supports power dissipation of just 55 nW/MHz/gate, it vows to reduce total chip power consumption to less than 20% of a standard FPGA.

Depending on density and pin count, pricing for the XPA-II is projected at $25 to $100 for 10,000 units per year. Beta customer support has already begun. Full production of the XPA-II is expected in the first quarter of next year. Delivery from start to finish is 10 to 16 weeks. Prototyping is in the three-to-five-week range.

AMI Semiconductor2300 Buckskin Rd., Pocatello, ID 83201; (208) 233-4690, FAX: (208) 234-6795, www.amis.com.

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