Turbocoder IP Core Supports Virtex II FPGAs

March 1, 2001
This turbocoder IP core for third generation WCDMA mobile base stations and handsets is based on Third Generation Partnership Program standards. The turbocoder core is optimized for implementation in Virtex II FPGAs and will be marketed exclusively by

This turbocoder IP core for third generation WCDMA mobile base stations and handsets is based on Third Generation Partnership Program standards. The turbocoder core is optimized for implementation in Virtex II FPGAs and will be marketed exclusively by Xilinx. The company maintains ownership of the original algorithms and design of the core and is offering customization services to Xilinx customers who have specialized application requirements. It also offers design services for ASIC implementation of the turbocoder core. The Xilinx turbocoder IP core is available now to beta customers. A full production release is planned by Xilinx for the second quarter. Both the encoder and the decoder cores will be available over the Internet at the price of $1,800 and $18,000 respectively.

Company: FRONTIER DESIGN BVBA

Product URL: Click here for more information

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