Turbo Encoder Coprocessor Supports 3GPP HSDPA

Nov. 1, 2003
Touted as the industry's most cost-effective turbo encoder co-processor available to support the recently established 14.4 Mb/s third generation partnership project (3GPP) high-speed downlink packet access (HSDPA) standard, designers can deploy the

Touted as the industry's most cost-effective turbo encoder co-processor available to support the recently established 14.4 Mb/s third generation partnership project (3GPP) high-speed downlink packet access (HSDPA) standard, designers can deploy the MegaCore turbo encoder function using the Cyclone device family for as little as seven dollars. The turbo encoder is supported by a reference design that employs Texas Instruments' TMS320C6000 digital signal processor and includes a basic set of application programmer interfaces. To increase data transfer rates from 2 Mb/s to 14.4 Mb/s, version five of the 3GPP wireless standard added a HSDPA channel and dynamic block sizing from 40 to 5114 bits that must be supported every 2 ms. Off-loading this function to a dedicated co-processor is said to eliminate bottlenecks and free up processor bandwidth for system functions. The turbo encoder MegaCore function is priced at $5,995 and the turbo decoder core is $33,995. For further information, contact ALTERA CORP., San Jose, CA. (408) 544-6397.

Company: ALTERA CORP.

Product URL: Click here for more information

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