1- And 10-Gbit Physical Layer Interfaces Conserve Energy With Powerdown Modes

June 10, 2002

Based on a proprietary DSP architecture, a family of 1- and 10-Gbit Ethernet PHYs includes a power-down capability to reduce standby power consumption. The four-channel, 10-Gbit/s MY3004 PHY's all-digital receiver trims power consumption and delivers the best bit-error-rate (BER) performance (by almost two orders of magnitude) of any 10-Gbit/s device. Each of the four SERDES channels can handle 1, 1.5, 2, 2.5, and 3.125 Gbits/s. The chip has selectable operating modes so it can function as a basic SERDES, or provide a 10-Gbit Ethernet or 1000BaseX interface, or support InfiniBand, Fibre Channel, or a custom interface. The MY3004 comes in a 17-mm, 256-ball BGA package and dissipates about 1.1 W. The MY1001 1-Gbit PHY supports IEEE 802.3ab (1000BaseT), IEEE 802.3u (fast Ethernet), and IEEE 802.3 (10BaseT) and can operate in either half- or full-duplex modes. It comes in a 128-lead PQFP and consumes about 1.8 W. Samples are immediately available. In lots of 1000, the MY1001 costs $20, and the MY3004 costs $85.

Mysticom Inc.
www.mysticom.com; (650) 210-8080

About the Author

Dave Bursky

Technologist

Dave Bursky, the founder of New Ideas in Communications, a publication website featuring the blog column Chipnastics – the Art and Science of Chip Design. He is also president of PRN Engineering, a technical writing and market consulting company. Prior to these organizations, he spent about a dozen years as a contributing editor to Chip Design magazine. Concurrent with Chip Design, he was also the technical editorial manager at Maxim Integrated Products, and prior to Maxim, Dave spent over 35 years working as an engineer for the U.S. Army Electronics Command and an editor with Electronic Design Magazine.