The 90-nm process mark has filled the design industry with both awe and trepidation. It demands new design tools, processes, and expertise. Despite the state of the economy and many design hurdles, however, companies are moving toward this process. Barcelona Design, Inc. (www.barcelonadesign.com) is one such company. It announced a plan to develop products in 90-nm technology. Taiwan Semiconductor Manufacturing Co. (TSMC) is expected to share information with Barcelona. The foundry will support the development of analog intellectual-property (IP) engines based on its own Nexsys 90-nm process technology.
Barcelona is slated to launch its first 90-nm product in the first half of next year. The company's plan is to meet the requirements of the systems-on-a-chip (SoCs) targeted at the computing, communication, and consumer segments. To do so, it will provide synthesizable analog or mixed-signal components for analog functions like phase-locked loops and data converters.
The move to 90 nm also is being driven by Agere Systems (www.agere.com). The company will begin production volume manufacturing of 90-nm chips next year. Its ASIC semiconductor technology platform, which also is based on TSMC's Nexsys process technology, focuses on communications applications. Called the AGR90, it vows to accelerate the pace at which products reach the market by about six months.
Using technology that's one-thousandth the width of a human hair, the Agere platform can also shrink the size, silicon costs, and power consumption of equipment like cell phones, PCs, and networking equipment. Compared to other semiconductor processes, the AGR90 should act as a foundation for substantially increasing wireline- and wireless-Internet speeds and information-carrying capacities. It promises to almost double the products' channel density, thereby doubling overall performance. At the same time, this melding of design capabilities and IP can nearly halve the number of chips needed for current equipment.
The AGR90 platform includes various types of standard protocols, serial/deserializer (SerDes) subcircuits, encoding schemes, DSPs, I/O cells, microprocessors, memory, and more. By including all of the elements needed to rapidly design an ASIC in the 90-nm process technology mode, it achieves its time savings. A customer can integrate multiple SerDes subcircuit blocks with double-data-rate I/O and standard protocols. These pre-existing functions can be combined with millions of logic gates and memory bits in an area-array flip-chip package.
Watch for more companies to join the 90-nm process-technology fray. The Barcelona and Agere products both forge paths for other companies to make the transition. In 2003, a wave of 90-nm products is sure to follow them into the market.
