Digital ICs/DSP: 90-nm Process Yields Small, Low-Cost 64-Mbit Flash Memories

March 29, 2004
Based on 90-nm design rules, the 28F640-W18 NOR-type flash memory offers a 64-Mbit capacity and occupies less than half the chip area of the company's previous 64-Mbit device fabricated with 130-nm rules. It operates from a 1.8-V supply for use in...

Based on 90-nm design rules, the 28F640-W18 NOR-type flash memory offers a 64-Mbit capacity and occupies less than half the chip area of the company's previous 64-Mbit device fabricated with 130-nm rules. It operates from a 1.8-V supply for use in portable systems, permits direct code execution (execute-in-place), has enhanced factory programming for faster data storage, and provides dual code and data storage. Burst accesses can take place at 66 MHz. Page-mode access is 60 ns for the first word and 20 ns for subsequent words. Samples are available, with volume quantities due in the third quarter. In lots of 10,000, the chip costs $10.26 apiece. Versions based on the company's StrataFlash multilevel cell and 90-nm process with 256- and 512-Mbit capacities will be sampled later this year.

Intel Corp.www.intel.com

About the Author

Dave Bursky | Technologist

Dave Bursky, the founder of New Ideas in Communications, a publication website featuring the blog column Chipnastics – the Art and Science of Chip Design. He is also president of PRN Engineering, a technical writing and market consulting company. Prior to these organizations, he spent about a dozen years as a contributing editor to Chip Design magazine. Concurrent with Chip Design, he was also the technical editorial manager at Maxim Integrated Products, and prior to Maxim, Dave spent over 35 years working as an engineer for the U.S. Army Electronics Command and an editor with Electronic Design Magazine.

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