Virtex-II Architecture Gets DSP Algorithms And Tools

Eleven new pre-engineered digital signal process algorithms and tools and several new embedded DSP features have been developed for the next-generation Virtex-II architecture. The eleven new algorithms, or cores, are designed for implementing data communication and image processing applications. One core is a filter generator that is integrated with MATLAB. This allows users to design sophisticated filter algorithms using industry standard tools and to automatically generate an optimized implementation for the company's field programmable gate arrays (FPGAs). Other of the pre-engineered DSP algorithms include a multiplier generator, a parameterized multiply accumulate (MAC), DCT/iDCT, three G.711 PCM codec cores, and four color space converters. Licenses for the algorithms and tools start at $1,000.