MPU Infiltrates VoIP Systems

Jan. 18, 2005
Optimized for VoIP equipment, the 32-bit SH7710 RISC microprocessor (MPU) integrates an IPsec accelerator and two Ethernet controllers. The device operates at 200 MHz and can encode and decode up to four channels of voice while running an operating

Optimized for VoIP equipment, the 32-bit SH7710 RISC microprocessor (MPU) integrates an IPsec accelerator and two Ethernet controllers. The device operates at 200 MHz and can encode and decode up to four channels of voice while running an operating system, session initiation protocol, and another networking protocol stack. Providing 260-MIPS performance, an integrated DSP unit performs multimedia related tasks, such as MPEG computations used to transmit signals from IP cameras. A complete set of VoIP middleware is supported on the device that can be licensed to VoIP equipment OEMs. All speech CODECs are ITU compliant. Available in either a 256-pin HQFP or CSP, sample price is $20 each. RENESAS TECHNOLOGY AMERICA INC., San Jose, CA. (408) 382-7407.

Company: RENESAS TECHNOLOGY AMERICA INC.

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