XO/VCXOs Minimize Jitter And Cost

April 8, 2011
Programmable crystal oscillator uses digital PLL to minimize jitter.

Fig 1. The Silicon Labs Si514 programmable XO uses the patented DSPLL technology to get any frequency in the 100-kHz to 250-MHz range. Programming of the DSPLL registers and dividers is by way of an I2C port. On-chip supply regulation reduces jitter and noise.

Fig 2. The Si51x series crystal oscillators are available in standard 5- by 7-mm package or the smaller 3.2- by 5-mm package shown here.

Practically all new products today require at least one crystal oscillator for processor timing or the timing of communications functions. Oscillators of common standard frequencies are readily available on short notice, but lead times on special custom clock frequencies are often unacceptably long. Silicon Laboratories has a solution with its new line of crystal oscillators.

The company recently expanded its programmable oscillator line with a family of crystal oscillators (XOs) and voltage-controlled XOs (VCXOs) designed to minimize jitter, reduce system cost, and simplify design complexity for a wide range of applications needing stable frequencies up to 250 MHz. The Si51x XO/VCXO family provides superior frequency flexibility for networking, communications, storage, server, embedded computing, and broadcast video systems. It also targets FPGA, serializer/deserializer (SERDES), and multi-rate clocking applications.

The Si51x family includes the industry’s first I2C-programmable, low-jitter XOs and the first dual-frequency XO/VCXOs in space-saving 3.2-mm by 5-mm packages. The family offers drop-in compatibility with fixed-frequency XOs and surface acoustic wave (SAW) oscillators while providing frequency flexibility and power-supply noise rejection. The 0.8-ps rms jitter spec  holds across the entire frequency range. Also, the Si51x XO/VCXOs provide up to 2.5 times lower jitter than traditional factory-programmable oscillators.

The Si51x XO/VCXOs use Silicon Labs’ patented digital phase locked loop (DSPLL) technology, which digitizes the phase detector output and then uses a digital signal processing (DSP) loop filter to operate a digital voltage-controlled oscillator (VCO) (Fig. 1). The result is superior PLL specs, especially low jitter.

The DSPLL generates any frequency from 100 kHz to 250 MHz with 26 parts per trillion frequency programming resolution. Unlike traditional crystal and SAW oscillators that require a unique crystal or SAW resonator for each frequency, the Si51x devices pair a DSPLL clock IC with a single 39-MHz crystal. The DSPLL registers and dividers are then programmed for the exact frequency needed. Frequency stability versions of ±30, 50, and 100 ppm are available.

The Si510/1 XO is a single-frequency device while the Si512/3 offers dual-frequencies that are ideally suited for replacing two discrete XOs and a multiplexer in networking, broadcast video, and other applications that use multi-rate SERDES devices and FPGAs. The frequencies are factory programmed.

The Si514 I2C-programmable XO can be used to replace clock generators that require an external crystal for local clock generation. It also can be used to replace direct digital synthesis (DDS) clock ICs and digital PLLs that typically use a digital-to-analog converter (DAC) and VCXO for clock synchronization. The Si514 is a great choice for prototyping since it can be reprogrammed to any frequency.

The Si51x XO/VCXOs support a wide range of voltage options (1.8, 2.5, and 3.3 V) and output formats (LVPECL, LVDS, CMOS, and HCSL), making them ideal for applications that require varying frequencies, formats, and power supply voltages. The devices are available in the standard 5- by 7-mm and 3.2- by 5-mm packages (Fig. 2).

All Si51x devices include on-chip voltage regulation, which minimizes the impact of system-level power-supply noise on clock jitter and keeps jitter below 1 ps rms even in noisy system environments. This noise immunity is advantageous in FPGA-based systems that rely on tightly regulated switched-mode power supplies. By filtering power-supply noise inside the device, Si51x XO/VCXOs can be mounted next to FPGAs without requiring external low-dropout regulators for power-supply filtering.

Si510/511 single-frequency XO pricing in 10,000-unit quantities ranges from $2.10 to $3.69, depending on ordering options. Si514 I2C-programmable XO pricing in 10,000-unit quantities ranges from $2.71 to $10.23. The Si5XX-PROG-EVB development kit, priced at $125, is available now for evaluation of I2C-programmable XO/VCXOs. The Si5XX-EVB, priced at $45, is used to evaluate single- and dual-frequency XO/VCXOs.

Silicon Laboratories               
www.silabs.com/pr/timing

About the Author

Lou Frenzel | Technical Contributing Editor

Lou Frenzel is a Contributing Technology Editor for Electronic Design Magazine where he writes articles and the blog Communique and other online material on the wireless, networking, and communications sectors.  Lou interviews executives and engineers, attends conferences, and researches multiple areas. Lou has been writing in some capacity for ED since 2000.  

Lou has 25+ years experience in the electronics industry as an engineer and manager. He has held VP level positions with Heathkit, McGraw Hill, and has 9 years of college teaching experience. Lou holds a bachelor’s degree from the University of Houston and a master’s degree from the University of Maryland.  He is author of 28 books on computer and electronic subjects and lives in Bulverde, TX with his wife Joan. His website is www.loufrenzel.com

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