Chipset Supports Intel Xeon-Based Servers

    Nov. 1, 2001
    Developed for future Intel Xeon-based servers, the Grand Champion HE architecture delivers 6.4 GB/s of memory bandwidth and up to 5 GB/s of I/O throughput, supporting a maximum of six PCI-X bus segments and one 32-bit PCI bus. It will support two- and

    Developed for future Intel Xeon-based servers, the Grand Champion HE architecture delivers 6.4 GB/s of memory bandwidth and up to 5 GB/s of I/O throughput, supporting a maximum of six PCI-X bus segments and one 32-bit PCI bus. It will support two- and four-way implementations of Intel Xeon processors for servers, storage and networking appliance platforms. The 6.4 GB/s memory bandwidth is achieved by deploying banks of DDR memory operating in a four-way interleaved configuration. The design accommodates up to 16 PC1600 DIMMs with capacities of 128 MB through 2 GB each, for a system maximum of 32 GB. The chipset also includes a north and south bridge. BROADCOM CORP., Irvine, CA. (949) 450-8700.

    Company: BROADCOM CORP.

    Product URL: Click here for more information

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