How AI is Supercharging Chip Design Workflows

What you'll learn:

Assistive AI: Improving chip design workflows.
Agentic AI: The next wave of EDA automation and optimization.
AI’s impact on the engineering workforce.

For decades, the design of leading-edge chips has been a high-wire act—balancing tight deadlines, sophisticated workflows, and the relentless need to consult scattered, often outdated, sources of truth. Electronic-design-automation (EDA) tools excel at well-defined optimizations, but engineers still find themselves mired in repetitive manual tasks and lengthy information hunts.

Early-career talent reportedly spend up to 40% of their time searching for answers. Waiting for human intervention leads to significant idle time when EDA tools aren’t used. Such manual steps slow down progress, increase the risk of mistakes, stifle creativity and innovation, and leave less room for the kind of bold thinking that drives industries forward.

To change the future of chip design work, EDA tools and flows are being enriched with AI to streamline the entire work processes. Innovations in assistive AI and increasing autonomy will redefine what engineers can achieve within the chip design cycle. The schedules and the results will not be determined by chasing down low-level information, rather they will be driven by the ambition of chip architects, effective team collaboration, and growing capabilities of core EDA tools.

Assistive AI: Improving Chip Design Workflows

AI has been—and continues to be—an EDA game-changer. The advent of reinforcement learning-based optimization, as well as large language models (LLMs) and AI-powered copilots, are reshaping the chip design landscape and providing engineers with an unprecedented level of assistance.

Today’s assistive AI tools can quickly process vast amounts of proprietary technical documentation and EDA tool logs, generate scripts and optimized code, and even offer real-time debug suggestions. To automate complex, multifaceted tasks, highly advanced EDA tools such as Synopsys.ai Copilot are combining generative AI with traditional EDA capabilities such as deep integration with power, performance, and area (PPA) evaluators, numerical simulation, and fast layout engines.

Early adopters are using these technologies to streamline processes related to:

Analog design, test, and verification
RTL and verification collateral generation
Timing analysis
Design rule checking

An immediate benefit is clear: Engineers are freed from the mundane aspects of chip design, allowing them to focus on architectural innovations, novel uses of powerful EDA tools, and higher-level problem solving — the fun stuff! AI assistants also fill in the knowledge gaps, reduce idle time for EDA tools, and make the chip design process more straightforward.

The technologies and proprietary data behind these early advances ensure that, in addition to impressive demos, a variety of technical questions are answered in practice and answered correctly. User feedback is utilized to improve future answers and suggestions.

Today’s AI assistants often focus on well-defined tasks, but the infrastructure developed for them also lays down the foundation for higher-level automation. As the industry continues to embrace AI, the next generation of EDA tools will offer deeper insights, predictive analytics, and even self-optimization capabilities (Fig. 1). As a result, the entire chip design flow will feel very different.

1. Assistive AI capabilities deliver productivity boosts for companies across a range of segments.

Agentic AI: The Next Wave of EDA Automation and Optimization

So, what’s next? A new era of truly automated decision-making and orchestration beckons in the form of agentic AI. Autonomous systems will be able to make design decisions with minimal human intervention.

Agentic AI builds on the capabilities of current AI tools, which require human inputs and predefined parameters. It has the potential to act as a powerful assistant to a human engineer, an independent and self-directed design partner, or, rather, a cohort of partners that spring into action when needed, collaborate in parallel, and naturally accommodate improved versions of core EDA tools.

Imagine a system that not only automates repetitive tasks, but also proactively identifies possible design improvements, foresees potential bottlenecks, and adjusts the workflow accordingly.

Early AI agents have remained relatively specialized and limited in their capabilities—built for specific use cases and isolated within certain applications and datasets. However, as our experience with agents grows, we can entrust them with greater scope of work and broader data access.

At the Synopsys User Group (SNUG) conference, Synopsys President and CEO Sassine Ghazi outlined his vision for AgentEngineer technologies, marking a significant advance in this transformative technology. He predicted a steady increase of workflow automation, starting with actions and orchestration, followed by learning and eventually fully autonomous decision-making. This progression will take place over the next few years, with multi-agent systems replacing traditional manual workflows.

The transition to AgentEngineer technology will allow design teams to completely Re-engineer Engineering and take advantage of the latest AI tools and innovations. This journey will have five levels of automation (Fig. 2):

Level 1 is where AI assistants and copilots are already creating scripts and designing collateral autonomously using LLMs. This is where we are today.
Level 2 will introduce agents that can act on specific tasks of a workflow and trained with extensive expertise in those areas.
Level 3 will enable multi-agent capabilities and orchestration, which will involve the coordination of many agents and agent types across the workflow.
Level 4 involves advanced learning capabilities, allowing the agentic solutions to assess the quality of results and refine flow steps, settings, and even input files to improve results.
Level 5 is where the term “autopilot” will really start to become applicable, offering high-level decision-making, fully autonomous reasoning, and complex planning capabilities. This is where the human engineer will simply enter the product specification and an entire subsystem will be created automatically.

Agentic AI framework — 2. This agentic AI framework outlines a progression from foundational AI capabilities to fully autonomous multi-agent systems capable of high-level decision-making and actions.

AI’s Impact on the Engineering Workforce

As AI technologies rapidly transform chip design, their impact on the engineering workforce is equally profound. AI reduces the burden of repetitive, tedious tasks, freeing engineers to focus on higher-level work that’s more strategic and creative. This shift not only enhances productivity, but also job satisfaction—engineers will spend more time on activities that drive innovation and value creation.

For businesses, it will free up much needed engineering capacity in the face of aggressive roadmap timelines and a shortage of skilled talent. With AI tools taking on more tasks, human engineers can work on additional projects or focus on activities that differentiate products and accelerate time-to-market.

The increasing use of AI has raised flags of organizational uncertainty within the silicon engineering community. With AI-driven tools orchestrating more of the chip design process, some have expressed concern about traditional roles and responsibilities and the prospect of reskilling or reallocating talent. Questions have been raised about accountability and who should be responsible for AI training and decision-making, and trusting the AI tools to perform accurately.

In the context of semiconductor EDA and AI-driven design tools, trust isn’t about having blind faith in algorithms, it’s more about having confidence in the data, the processes, overall capabilities, completion schedules, and ultimately the outcomes. In the semiconductor world, it’s always been about “Trust but Verify.”

AI tools will increasingly be used to augment or even replace human decisions in critical design stages like floorplanning, synthesis, and verification. In this case, trust really hinges on being able to check the results for correctness and optimality with independent checkers and whether its outputs are explainable and consistent.

It’s important to remember that humans make mistakes, too, and in most cases the chip still tapes out successfully due to a rigorous engineering review process and the help of the EDA tools. Here, AI that operates EDA tools should be able to meet or exceed the same high design standards that human engineers have been working toward for decades. Trust, then, means verifiable, predictable performance and not necessarily perfection.

Such legitimate questions and complex issues must be addressed to maintain user confidence in — and maximize the transformative potential of — tomorrow’s AI tools.

A Complex Balancing Act

Ultimately, the shift toward AI-driven chip design is a complex balancing act of extending tried-and-true design capabilities with novel technologies. Taking that design path can dramatically improve productivity and fuel innovation, but it also requires careful consideration to mitigate transition risks. Keeping the workforce in mind, we need to ensure that tomorrow’s tools augment human capabilities, upskill human designers, and increase engineering capacity significantly to drive innovation faster and further.

Fortunately, current progress and outlook are overwhelmingly positive.

The journey from tedious, inefficient processes to an AI-enhanced future has begun. The integration and use of AI tools are already delivering noticeable results. And with agentic AI on the horizon, the semiconductor industry is about to enter a new era of automation and innovation.