8-Bit ADC Handles 95 MSPS

Oct. 1, 1999

Well-suited for digitizing RGB graphics for workstations, PCs and component video outputs from VCRs, video cameras and set-top boxes, HI5630 monolithic, triple 8-bit, 95-MSPS ADC offers a fully pipelined architecture and innovative input stage that lets it accept a variety of single-ended or fully differential inputs. Only one external clock is needed to drive all three converters, and an internal bandgap voltage reference is provided for greater integration. Maximum full power bandwidth is 250 MHz. Power requirement is a single 5V, and an encode clock is needed. Data output latches are provided to present valid data to the output bus with a latency of five clock cycles. Input frequency is set at 1 MHz, and ENOB performance of the A/D equals 7.5 bits, which guarantees exceptional accuracy. Coupling the device with the firm's 250 MHz phase-lock loop forms a chipset well-suited for LCD monitors, projectors, plasma displays and high-speed multi-channel data acquisition applications.

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