RFIC Simulator Sports Speed And Capacity

Dec. 17, 2007
With chip complexity on the rise, RFIC designers need to simulate as much of their creations as possible. The alternative is greater risk of respins. Intended to speed the design of large-scale RFICs for wireless communications products, Agilent Technolog

With chip complexity on the rise, RFIC designers need to simulate as much of their creations as possible. The alternative is greater risk of respins. Intended to speed the design of large-scale RFICs for wireless communications products, Agilent Technologies’ GoldenGate Plus performs RFIC simulation, analysis, and verification. The tool combines the high-capacity GoldenGate simulator, acquired by Agilent from Xpedion in 2006, with a customizable data display, electromagnetic (EM) simulation and system-level design and simulation. The GoldenGate simulator is fully integrated into the Cadence Analog Design Environment. Its algorithms are optimized for the demands of large and complex RFIC design, and enable full characterization of complete transceivers before tapeout. It helps to ensure device manufacturability and reduces design spins, using frequency-domain-based capabilities to perform analyses such as Monte Carlo simulations, which are faster by orders of magnitude than traditional, transient-based techniques. GoldenGate Plus is available now in four configurations, with prices starting at approximately $42,000. Agilent Technologies
www.agilent.com

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