In the previous article (See Power Electronics Technology, June 2009), we showed how to compensate the boost converter operated in continuous conduction mode (CCM) using an analytical approach. Despite its repulsive aspect, the analytical study is extremely important for the design phase as it unveils the dependency of the poles and zeros locations with varying parasitic elements. It is, therefore, the designer's duty to ensure that the impact of these parasitic elements is well under control, and in keeping with the right design margins despite unavoidable production dispersions.
However, if analytical derivations work well in one operating mode, e.g. the CCM, they need to be reworked in case the converter transitions into a different mode, e.g. the discontinuous conduction mode (DCM). Furthermore, it is extremely difficult to predict the transient response resulting from the adopted compensation strategy.
In that respect, a SPICE model featuring auto-toggling capabilities can do a better job at assessing and testing the choices you have made. However, as with any automated tool, they require a minimum of engineering judgment to challenge the results: it's a bit like using a GPS without looking at a paper map to confirm the adoption of a sensible itinerary by the machine.
THE BOOST POWER STAGE
The boost power stage can be analyzed using new auto-toggling models. [1] Based on the pulse-width-modulator (PWM) switch model, it features full CCM/DCM auto-toggling capabilities and can work in both large- and small-signal simulations. The typical implementation of a boost-converter configuration follows Fig. 1 guidelines, where one can recognize the updated PWM switch model.
This application directly reflects the 60-W dc-dc boost converter we described in a previous article. This converter is intended to power a notebook from a car battery down to an 11.5-V input voltage.
In Fig. 1, the LoL/CoL network offers a quick way to close the loop in dc (during the operating bias-point-calculation, LoL is a short circuit) but allows ac modulation through CoL while LoL becomes open. If you probe the Vout node, you obtain the power stage response H(s). If you probe the Verr node, you display the loop gain T(s), made of the boost converter power stage, H(s), multiplied by the compensation circuitry, G(s). Another technique consists in inserting an ac source in series with R1, for instance, or in series with the op-amp output, but it requires more probing manipulations to obtain the diagram of your choice.
The static observation of Fig. 1 already delivers interesting information. First, the 19-V bias-point level available on the Vout node confirms the proper regulation of the loop. Then, the “d node” on the model undergoes a 397-mV bias level, indicating a 39.7% duty cycle value.
Of course, these calculations do not include the losses incurred by the power MOSFET's ohmic path associated with the output-diode forward drop, but they match our previous analytical calculations. An enhanced model that fully accounts for these parasitic terms is however proposed [1] and, as one can imagine, the impact of these parameters on the static duty cycle and the loop peaking can be quite significant.
In an averaged model, there is no switching component, naturally leading to a flashing simulation time. After a simulation of a few milliseconds, Fig. 2 can be plotted with the two input voltage limits. The extracted results at a 2-kHz crossover frequency again match the analytical results previously obtained.
COMPENSATING THE CONVERTER
Compared to the analytical method, the SPICE simulator lets us select a compensation strategy and check what transient response it leads to. One particular problem inherent to the voltage mode is the transition from CCM to DCM which occurs in light-load conditions. The auto-toggling model permanently evaluates the duty-cycle expression and checks whether a dead-time exists or not.
In the absence of a dead time, the model operates in CCM. When a dead-time appears, the model enters DCM automatically. Thanks to this technique, it is easy to explore the various operating modes without deriving any equation. Just change the load or the input voltage and the model will calculate the converter's operating mode.
It is now time to adopt a compensation strategy. However, we need to individually calculate each component around the op amp to form the desired G(s) transfer function. This task can quickly become tedious, especially if one wants to sweep several cases.
Fortunately, in the left side of Fig. 1 appears a parameters list. This list, typical of the Intusoft SpiceNET schematic capture, allows you to not only pass parameters to the models and components you are dealing with, but also offers a simple way to evaluate mathematical expressions. In our case, we have automated the type 3 compensation circuitry, letting us explore the effects of various poles-zeros combinations on the transient response: you select the poles and zeros you want and the resistor, R2, is adjusted to cross over at the selected frequency.
Let us try the strategy where we compensate the boost converter with a double zero at the resonant frequency f0 (430 Hz) followed by a first pole at the ESR zero location (7.9 kHz) and a second pole at half of the switching frequency (50 kHz). Loading the converter with a 200-mA current for a DCM operation, we can immediately see from the Fig. 3 ac sweep that this mode leads to a much lower crossover frequency compared to that of CCM: respectively 140 Hz and 2.4 kHz at a 15-V input voltage.
Given the differences in crossover frequencies, we can expect a larger undershoot in DCM than in CCM. Let us check what this undershoot could be. We know that the output impedance of a dc-dc converter is mostly dictated by the impedance of the output capacitor at the crossover frequency (if we neglect the ESR contribution). Therefore, if we consider a 100-mA step in both modes, we should obtain an undershoot voltage, Vp, dictated by:
Considering a 2.4-kHz crossover frequency in CCM, we expect an undershoot of about 7 mV. In DCM, given the low 140-Hz bandwidth, this drop will be in the 100-mV range. Using the large-signal models, it is easy to ask for the transient response by stepping the output from 2 to 2.1 A in CCM and from 0.1 to 0.2 A in DCM. The output results for a 15-V input voltage appear in Fig. 4. As expected, the DCM transient response is worse than its CCM counterpart.
The reduced phase margin brings a little bit of ringing but it does not show a converter on the brink of instability. What is nice with this SPICE model is that the operating point will automatically be adjusted when you vary the load or the input voltage. This is the interest brought by the simulation environment.
We could further sweep the parasitic elements (e.g. the ESR of the capacitor) and assess their impact on the loop response. However, despite perfectly compensating for their variations, we would still face the drastic bandwidth reduction in DCM.
There are several solutions that can be implemented to help increase the phase margin in DCM. The double zeros can be split and one of them moved further down the frequency axis.
Both zeros can also be kept coincident and moved down at once. Unfortunately, you will surely improve the phase margin but at the expense of response speed. Another valid approach is to abandon the voltage mode for a current-mode architecture.
CURRENT-MODE BOOST CONVERTER
Rather than directly controlling the duty cycle via the error signal, the op amp drives the inductor's peak-current set point and indirectly controls the duty cycle. In a boost converter, the current is sensed by inserting a resistor in series with the power MOSFET source, offering simple, ground-referenced information.
The voltage developed across this element during the turn-on event gives indication on the inductor peak current. When this voltage coincides with the peak setpoint imposed by the op amp, the controller instructs the MOSFET to turn off.
The simulation of a current-mode power supply does not differ from that of a voltage-mode converter: substitute the voltage model with a current-mode model and update the parameter list with the sense-element value (Ri). The model appears in Fig. 5. and shows a control-node input (V c) where the op-amp output connects.
Its bias point of 706 mV — together with a sense resistor of 100 mΩ — indicates a peak current of 7.06 A. To provide enough amplitude on this error voltage, a divider by three is classically inserted between the control input and the op amp. This is the role of resistor R7 and R6.
To fight sub-harmonic oscillations, a certain amount of ramp compensation has been added: this is the model Se parameter expressed in volts per second. The injected level in this example corresponds to a 50% inductor downslope (A/s) reflected to the sense resistor (V/s).
Since the current-mode converter behaves as a first-order system well below the sub-harmonic poles, its compensation becomes simpler and we can use a tool like the k factor [2]. However, if the peaking is gone, the RHPZ has not disappeared because of the current-mode implementation: it remains at the location it was when we were operating in voltage mode. It must, therefore, still be considered for the maximum crossover frequency selection.
Looking for a 2.4-kHz bandwidth, the compensated small-signal response appears in Fig. 6, where two modes at a 15-V input have been explored. As one can observe, the loop bandwidth and its associated phase margin remain almost unchanged regardless of the operating mode.
Another benefit of the current-mode operation is the absence of peaking brought by the inductor in voltage mode. The associated phase stress being left over, the designer feels more comfortable to compensate such a converter.
Given the similarities between the Bode plots at the two different modes, we can expect rather similar transient responses when the converter operates in either CCM or DCM conditions. We ran the simulations and the results appear in Fig. 7.
As expected, the deviation is almost the same, whatever the operating conditions are. This is one of the major advantages brought by the current-mode control: the converter deals very well with mode transition.
Thanks to the power of the SPICE simulation we have been able to, in a very short time, obtain the small-signal response of the current-mode boost converter and its associated transient. Trying to use a mathematical analysis tool to perform the same approach would have led to a much longer and complicated process, still without the ability to predict the transient response.
SUMMING UP THE RHPZ
This article ends the series dedicated to the Right-Half-Plane Zero. It has been shown that once the location of this zero has been correctly identified, the compensation of the power stage does not represent a difficult obstacle. On top of the unavoidable RHPZ action, the voltage-mode operation induces a wide crossover dispersion when the converter transitions from the continuous to the discontinuous mode of operation.
If precautions on the stray element impacts have not been taken, some unwanted ringing can occur. On the contrary, the current-mode version offers a narrower cross over range without affecting the phase margin when mode transition occurs.
Compared to a purely analytical approach, the SPICE simulation has offered a simpler and faster way to compensate a converter under study: not only the poles and zeros appear on the Bode plot, but the simulator can immediately show the transient response given by the adopted compensation strategy. As a summary, both methods are complementary and should be run in parallel during the analysis stage.
REFERENCES
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C. Basso, “Switch Mode Power Supplies: SPICE Simulations and Practical Designs”, McGraw-Hill, 2008
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D. Venable, “The k-factor: a new mathematical tool for stability analysis and synthesis”, proceedings of Powercon 10, 1983, pp. 1-12