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What you'll learn:
- Benefits of using an indirect current-mode instrumentation amplifier for large differential offsets.
- Design specs for a low-power application.
- Key design considerations when implementing an in-amp architecture.
- Step-by-step procedure for architecture implementation.
- The process for simulating the in-amp design.
In applications such as electromagnetic-flow (EM flow) meters and biopotential measurements, small differential signals are in series with much larger differential offsets. These offsets typically limit the gain that the circuit can take in the front-end design, which in turn impacts the overall dynamic range. The gain limitation is even more challenging when lower supply voltages are used—for example, in battery-powered signal chains.
One solution to address this large differential offset issue is to use anac-coupled measurement signal chain. Atypicalac-coupledsignalchainwouldincludealow-gaininstrumentationamplifier, followed by a high-pass filter and additional gain stages. In most applications, it’s preferable to get as much gain as possible at the first stage, as this helps improve the referred-to-input (RTI) noise of the following gain stages in the signal chain.
Thisarticlewillassistwiththedesignandtheimplementationofanindirect current-modeinstrumentationamplifier(in-amp)architecture,whichwillenable highgain andaccouplingallinonestage. ThedesignwillfeaturetheAD8237,a micropower, zero-drift instrumentation amplifier that has a wide common mode and differential input range. Another example of the indirect current-mode architecture is the AD8420. The main benefits of such an indirect current feedback in-amp are:
- It’s a low-power architecture.
- There’s no diamond plot limitation like with other typical architectures, such as in-amps composed of two or three op amps.
- Good gain drift performance can be achieved from external resistor matching.
- High CMRR can be achieved without relying on resistor matching.
- High-impedance reference pin.
The circuit in Figure 1 provides the overall schematic where the AD8237 indirect current-mode in-amp is chosen. However, to accomplish high gain and ac coupling all in one stage, an integrator circuit has to be implemented in a feedback loopwiththeAD8237.Thissolutionallows for moregainthaninstrumentationamplifier solutions composed of two or three op amps, which cancel the offset after gain is applied.
For the proposed architecture, the offset correction happens prior to the gain phase that enables the in-amp to have a large gain. Both architectures will be presented in the appendix. The ADA4505 op amp is used in thefeedbackloopastheintegratorcircuit.TheoutputoftheAD8237issensedby theintegratorinputanddrivesthereferencepinoftheAD8237toforcetheoutput oftheAD8237toVMID,whichissetonthe+inputoftheADA4505.
Eventhoughthe integrator circuit provides a low-pass filter function, in this situation, due to its use in the feedback loop, the overall circuit will have a high-pass filter transfer function. Thanks to this behavior, it will ultimately block any dc offsets prior to gain, making it possible to increase the gain further than other solutions. On top of that, it’s even more helpful with low supply voltages and large offsets since theheadroomlefttoworkwithislimited.
Theintegratorcircuitalsoforcestheoutput of the AD8237 at a chosen voltage via a reference pin. Indeed, the integrator is forcing the reference pin relative to the FB pin of the AD8237 to be equal and opposite to the differential voltage of the inputs.
DesignSpecificationsExample
For low-power applications, a single supply is usually available, typically somewhere between 1.8 and 3.6 V. The design choices for the circuit shown in Figure 1 depend on the input signal and offset amplitude range and frequency. Table 1 lists example design specifications for this circuit.
Thedesignchoicesforthiscircuitweremadewhileusingalow-bandwidthmode for the AD8237, allowing for gain flexibility and better stability.
DesignDescription
ThecircuitinFigure1consists of theAD8237,amicropower,rail-to-railinstrumentation amplifier, and the ADA4505, a zero-input crossover distortion op amp. Both can be powered from a minimum 3.3-V supply (VDD).
This circuit can output a voltage (VOUT), which represents the amplification of theac signal (VSIGNAL), presented at the input while removing any dc offset voltages (VOFFSET). A VMID voltage is generated to set both the positive input of the ADA4505 andtheAD8237gain-stageoutputcommonmodetomid-supply.TheVMIDisgeneratedwithavoltagedivider(R1,R2)andbufferedbyanotherADA4505.TheAD8237 comes in a mini small-outline package (MSOP) and the ADA4505 is housed in a compact wafer-level chip-scale package (WLCSP).
DesignConsiderations
1. Thepositive input of the ADA4505-2 (1/2),VMID, will set the value of VREF (RefpinofAD8237)and, consequently,theoutputVOUT.Toensurethemaximum output swing between the two supply rails, most instrumentation amplifiers’ optimalvalueisatmid-supply(+VDD/2)duetothecommon-modeinputvoltage vs. output range or diamond plot. A diamond plot tool to help with this will bepresented in the design simulations section.
2. Whenconsideringthetotalsupplycurrentforthecircuit,thechoiceofresistor values R1 and R2 also matters. The resistor choice is a tradeoff between noise and power dissipation. In the case of this circuit, it’s better to choose largerresistorvaluestominimizeadditionalsupplycurrent.Thesupply current added for this resistor divider would be:
In the case of the resistor divider (R1, R2), an additional capacitor C1 can beaddedtobandlimitthenoiseaswellasreduceany50Hz/60Hzorother interferenceonVDD.Thelargerthecapacitor,thebetterthenoisefiltering. However, it will take VMID longer to settle at power-up. The estimated time it takes to settle within 1%:
3. Whenchoosingpassivecomponentvalues(resistorsandcapacitors),thetolerances should be considered. In the case of the resistor divider (R1, R2), thetargetVMIDvaluecanshift,whichwouldinfluencetheoutputswingrangesVOUT of the AD8237 and ADA4505.
From the circuit in Figure 1, the transfer function will have two cutoff frequencies that are the result of a high-pass filter coming from the ADA4505 integratorcircuitinfeedbackandalow-passfilterresponseduetotheAD8237 bandwidth. Some gain error can be introduced, which relates to the cutoff frequency of the integrator (ADA4505) in combination with the AD8237 bandwidth. Thus, it’s important that the high-pass cutoff frequency and the low-passcutofffrequencyrespectacertainspan.Dependingonhowclosecutoff frequencies are to each other, the percentage gain error might change.
4. If the application requires the use of high-impedance sensors, buffers such as the ADA4505 could be used in front of the AD8237 inputs to provide higher input impedance and lower input bias current, as a buffer will convert a high impedanceinputintoalow-impedanceoutput.TheAD8237inputbiascurrent is 1 nA maximum over temperature.
DesignProcedure
1. VoltagedividerforsettingVMID:
Usingsection2ofDesignConsiderationsforthecircuitinFigure1,thevalues for the peripheral components are set to R1 = R2 = 1 MΩ to keep the supply-current contribution around 1 µA:
Outputof the resistor dividerprior to the ADA4505:
Assuming tolerance for R1 and R2 is 5% and taking into account the ADA4505offset:
To remove ac power-supply interference and noise from resistors, set C1 so thecutofffrequencyisatleastlessthantheminimumVSIGNALfrequencyof20Hz.
Notethatthecapacitorvaluecanbelargerifit’sneededtofurther bandlimit the noise:
Inthiscase,C1issetto 22nF,whichprovidesafrequency of:
2. Instrumentationamplifier(AD8237)gainvalueVSIGNAL:
ConsiderthattherangespanofEMflowsensors’outputtypicallyisapeak-to-peaksignalamplitudegoingfrom±75µVto±6mV.ForthecircuitinFigure1, theamplitudepeak-to-peaksignalamplituderangewillbesettoVSIGNAL=6mVpeak with a frequency of 30 Hz.
Then,considertheAD8237outputswingrangelimitstothesupplyrails.These valuescanbefoundinthedatasheetfrom“OutputSwing.”Let’susethecaseRL= 10 kΩ swing case at +25°C to be conservative:
For a 3.3-V supply:
Since the output is fully differential, the output will swing with respect to VMID will be, worse case:
Forpositiveinputsignals(VMIDMAX=1.732V):
Fornegativeinputsignals(VMIDMAX=1.568V):
Now to set the gain, add up the total expected differential input signals and use the lower of the positive and negative swing ranges to set the max swingrange:
Considering the output voltage rangelimits, the AD8237 gain should be less than 253. To leave some margin for DC errors/others, the gain value forthecircuitinFigure1shouldbelessthanthemaximumpossiblevalue.There’s also a tradeoff between the gain and the settling time: the higher the gain,theslowerthetimeconstantofthefilter.Owingtothosecomments,the AD8237 gain is set to 101.
Notethebenefitofdesignconsiderations in Step1intermsofmaximization of the swing value.
From the datasheet, the associated formula for the gain is:
TheAD8237datasheetprovidessuggestedresistorvaluesforgainselection. For the selected gain of 101, the values of these resistors should be RF1 = 1 kΩand RG1 = 100 kΩ.
3. In-amp(AD8237)bandwidth:
Fromthedatasheet,thecutofffrequencyvalueis:
If the design specification requires a certain minimum attenuation for the maximum signal frequency, this can be easily checked for a given filter cutofffrequency:
4. Settingthehigh-passfiltercutofffrequency:
Ahigh-value,high-passfiltercutofffrequencysetbytheintegratorcangettoo close to the cutoff frequency of the low-pass filter set by the AD8237 bandwidth as explained in the Design Considerations section. This will introduce some gain error from the gain established previously.
Assuming±5%toleranceforR3andC3,thefastesttimeconstantshouldbe lessthan the VSIGNALminimumfrequency:
The resistor R3 will have a constant value of 1 MΩ to minimize the current through this resistor into the op amp:
Taking the nearest standard capacitor value to have approximately a cutoff frequency of 20 Hz, let’s set C3 = 1.5 µF, so, the updated cutoff frequency is:
If the design specification requires a certain minimum attenuation for the minimumsignalfrequency,thiscanbeeasilycheckedforagivenfiltercutoff frequency. See an example for this circuit:
5. Offsetvoltage:
BothsignalsVOFFSETandVCMhavelimitations.
Asexpected,thedcoffsetcanbelargerthanwhatweusuallyfindinmost applications.Inthissituation,thevoltagevaluemustbeVOFFSET≤±VMID.IftheDC offsetisgreaterthanthislimit,theVREFvoltagevaluegoesoutsidethevoltage supply range of the ADA4505. The equation linked to the reference pin is setto: VREF = VMID – VOFFSET. The VOFFSET will be set at 1 V.
Asforthecommon-modevoltage,it’sdirectlylinkedtotheVOFFSETvalueasVCM must be in the range:
Ifthoselimitationsaren’tverified,theinputvaluesoftheAD8237areeither overorunderthesupplyranges.TheVCMwillbesetat1.65V.
DesignSimulations
Tocheckthecommon-modeinputrangevs.outputvoltageordiamondplotforan instrumentation amplifier, you’ll want to provide the supply voltage +VDD, reference voltage,gain,common-modeswing,anddifferentialinputswing.Theinstrumentation amplifier diamond plot tool from Analog Devices helps to see if the input swing is within the operating range of the part. Take note that the output swing used for the tool uses the worst-case load conditions (smallest resistive load), so if you design to the tool limits, there would be additional margin for larger resistiveloads.
LookingattheresultsinFigure2,thepurpleoutlineistheusable range of the AD8237 for the given supply voltage, output swing, input common-mode range, and reference voltage of the part. The red outline shows how much of this range you’re using for the given common-mode and differential inputmodeswing.
Thegoalistokeeptheredoutlinewithinthepurpleoutline.Ifcertain conditionsviolatethis,thetoolwillshowtheerrorandproviderecommendations. It’s important to note that implementing the integrator circuit in the feedbackloop isn’t possible in this interface.
However, a workaround is to configure the diamond plot input signal as if the VOFFSET and VCM voltage of the circuit(inFigure1)wereaddedin. Hence, usingtheinterval(0.65to2.65V)asthedc offset is removed and isn’t gained up. It also showcases that the common-modevoltagecouldbehigherasthere’sstillsomeroomfortheoutputtoswing. To further understand what’s happening inside the instrumentation amplifier, the Internal Circuitry tab will show the voltages of internal nodes.
The LTspice simulation tool can check against the design procedure calculations made earlier, including other specifications of interest such as the noiseperformanceinthesignalbandofinterest.TheLTspiceschematicis shown in Figure 3.
The first simulation (Figs. 4 and 5) is a transient simulation withadcoffsetof1Vandaninputsignalof±6mVat30Hz.Figure4showsthe signal at different stages in the circuit. Figure 5 is a zoomed in version ofFigure 4 once the circuit has settled and the integrator capacitor is charged to thefinalvalue.Thebluecurveistheoutputoftheintegratororreference voltage pinof theAD8237. Thered curveis theVMID valuedesigned toVDD/2 and thegreen curveis the final30-Hz outputsignal gained, VOUT.
Table2 showsacomparisonofthedesigngoalvs.simulationresultsforthetransientsimulation.ForthemaximumandminimumVOUTvalue,theexpectedvalues come from VOUT = VMID ± VSIGNAL × 101, which in our situation gives us the expected valuesequalto2.256Vand1.044V.TheVREFvalueexpectedisequaltoVMID–VOFFSET,whichgivesusanexpectedvalueof0.65V.AsforVMID,wecalculated it to be the mid-supply voltage, which in our case is 1.65 V.
The results obtained in the transient analysis compared with the expectations are quite similar in terms of voltage output. However, 17 seconds are needed for the simulation to settle and for the output to get to its final value, due to the largeintegratorcapacitorandthelargedcoffsetimplemented.Thissettlingtime comes from the fact that the simulation starts at time 0 s, and the capacitorneeds time to charge to the final value.
The next simulation in Figure 6 shows the frequency response of the circuit in Figure3withadcoffsetof1Vandaninputsignalof±6mVat30Hz.Cursors 1 and 2 from Figure6wereplacedatthe–3dBpointforthehigh-passandlow-pass filters, respectively. Table 3 shows a comparison of design goals vs. simulationresults.
ThesimulationinFigure7showsthevoltagenoisedensityvs.frequencyRTIfor the circuit in Figure 3. This is done by dividing the output noise by the total gainofthesolution(101).Forthebandpassfilterfunction,weneedtochoosethe integration frequency interval to compute total noise.
Fortheupperfrequency,wewillusethesensormaximumfrequencyvalueestablishedearlier,whichis220Hz.Forthelowerfrequency,wewillalsousethesensor minimalfrequencyvalueestablishedat20Hz.Inthissituation,theresulting noise will be from the integration from 20 Hz to 220 Hz.
The measured noise will actually be higher due to the bandpass filtercutofffrequencies.TheLTspicesimulationresultsassumeapost-processingbrickwallfilter to have a sharp roll-off at 20 Hz and 220 Hz.
The command line in LTspice is then set to be .noise V(VOUT) V1 dec 100 20 220. Hold the control key and left click on the waveform name (V(ONOISE)/101). The rms noise can easily be converted to peak-to-peak noise using the equation:
AquickcheckoftheAD8237noiseandADA4505noisedeterminedthatthe AD8237 is the dominant noise source.
MeasuredResults
Tohighlightthepreviousresults,hardwaretestingispossibleasboththeAD8237 and ADA4505 offer test boards. The soldering of each component can be done fromthetestboards’schematics.Whenusingbothtestboardsatthesametime, atraceontheAD8237boardmayneedtobecuttoconnecttheVMIDvoltagetothe RGresistors.
To ensure a better understanding, the values of components were set and taken from the design procedure section, the same as with the design simulation. To simulate the EM flow meters or biopotential measurement sensors, different measurement equipment was used, such as a voltage calibrator and an arbitrary waveformgenerator.
Forthistest,theinputsignalsweresetwithadcoffset (VOFFSET)of1V,acommon-modevoltageof1.65V,andaninputsignal (VSIGNAL)of±6mVat30Hz.
Looking at the results shown in Figure 8, the output voltage VOUT (yellow curve) performance has a small voltage off from the expected values but is still in linewithexpectations.
Table4 showsasummaryofdesigngoalsvs.measuredresults.
The differences in the design goal vs.simulation results can have different origins:
- Theresistorsusedhada5%errortolerance,meaningtheVMIDvaluecould havebeen shifted.
- The bench setup may have limitations that can result in minor deviations as shown by the measured simulations, VOFFSET and VSIGNAL.
Tables 5 and 6 present some of the specifications of the devices used in the design.
Conclusion
When capturing signals from sensors such as EM flow in fieldtransmittersorelectrodesinbiopotentialapplications,thesignalofinterest is usually sitting on much larger dc offsets. To make it easier to extract the relevantinformationfromthesesensors,onesolutionistoimplementanac-coupledmeasurement signal chain. The aim is to remove the dc offsets while amplifying the ac signals.
An instrumentation amplifier like the AD8237 can provide the gain and the ac is coupled all in one stage by incorporating an integrator circuit in the feedback loop. By removing the dc offset at the input stage, this circuit enables maximum signal gain to be applied at the very input of the measurementsignal chain. This minimizes the input referred noise of the overall measurementsolution.
Appendix
In Figures 9 and 10, the indirect current-mode instrumentation amplifier and the three-op-amp instrumentation are displayed. The indirect current-mode instrumentation amplifier allows for more gain than instrumentation amplifier solutions composed of two or three op amps, which cancel the offset after gain isapplied.Fortheproposedarchitecture,theoffsetcorrectionhappenspriortothegainphase,whichenables thein-amptohavealargegain.Here’sadescription of both architectures.
The indirect current-mode instrumentation amplifier in Figure 9 is based on a one-stageconfiguration.TheinputvoltagesareappliedtothefirstGM1cell,whilethe GM2 cell is in the feedback loop. The internal integrator Amplifier A forces a replicaofVIN1atVIN2.
The three-op-amp architecture in Figure 10 is based on a two-stage configuration.Thefirsttwoopamps (U1andU2),RGAINresistor,R2resistors,andR1resistorsform noninverting amplifiers and are considered as the input stage. It provides unity common-mode gain.
The differential gain is set by the resistor RGAIN and equal to:
Thelastopamp,U3,andtheR3resistorsformadifferentialamplifierthatcreates the output stage of the instrumentation amplifier. It provides unity differential-mode gain and common-mode rejection. The injection point of the reference for thisarchitectureisatthesecondstageafterthefirstgainstageisapplied.
Acknowledgments
Key consultants for this article were David Plourde, IC Design Engineer, Scientific Instruments (SCI) Group; AineMcCarthy,LeadSystemsApplicationsEngineer,AutomotiveGroup; and TimGreen,SeniorAnalogApplicationsEngineer,ScientificInstruments(SCI)Group
References
LTspice: LTspice is a high-performance SPICE III simulator, schematic capture, and waveform viewer with enhancements and models for easing the simulation of switching-regulator, linear, and signal-chain circuits.
InstrumentationAmplifierDiamondPlotTool: Thediamondplottoolisawebapplicationthatgeneratesaconfiguration-specific output voltage range vs. input common-mode voltage graph, also known as the diamond plot, for ADI instrumentation amplifiers.