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The junction temperature of power MOSFETs is one of the major criteria used to obtain temperature derating curves for power converters. This article describes an improved technique for determining MOSFET junction temperature and switching losses more accurately based on the given thermal resistances and lead and case (package) temperature measurements.

To keep the junction temperature (T_{j}) within specifications, allowable drain (leads) temperature, (T_{D}), is often calculated as:

T_{D} = T_{j} – (P_{j} × θ_{JD}) (1)

where P_{j} is the total heat power generated inside the package (including conduction, switching, and gate losses), and θ_{JD} is the junction-to-drain (leads) thermal resistance, which is a package-related parameter provided in the MOSFET’s data sheet. The table shows typical values of θ_{JD} for some standard power MOSFET packages.

For example, if a MOSFET in an SO8 package (θ_{JD} = 15°C/W) dissipates a P_{j} of 1 W and must maintain a junction temperature below 125°C, then the measured drain temperature must not exceed 110°C according to Equation 1:

T_{D} = 125°C – (1 W × 15°C/W) = 110°C (2)

Using Equation 1 implies that P_{j} can be determined under any operational condition and that the total power generated inside the package is dissipated to ambient through the drain leads. In reality, the accuracy of the P_{j} calculation is relatively low because switching losses in the MOSFET cannot be calculated accurately enough. Also, since a portion of P_{j} is dissipated to ambient through the MOSFET package, the actual heat flow through the drain leads is smaller than P_{j}, which presents another source of error.

The more accurate technique starts by considering the MOSFET thermal model in the figure, which is a modification of the model used in “Estimating TJ of SO-8 Power MOSFETs” at www.irf.com/technical-info/designtp/dt99-2.pdf.

*This modified thermal model of a MOSFET illustrates how the total heat P*

_{j}generated in the device is dissipated to ambient through two parallel branches: junction-to-drain (leads)-to-PCB-to-ambient and junction-to-case (package)-to-ambient.According to this model, the total heat generated in the package, represented by current source P_{j}, flows to ambient through two parallel branches. The first is the junction-drain (leads)-to-PCB-to-ambient route (the “drain” or “lead” branch, labeled P_{jD}) with junction-to-drain thermal resistance θ_{jD}, drain-to-PCB thermal resistance θ_{DB}, and PCB-to-ambient thermal resistance θ_{BA}. The second is junction-to-case (package)-to-ambient (the “case” or “package” branch, labeled P_{jC}) with junction-to-case thermal resistance θ_{jC} and case-to-ambient thermal resistance θ_{CA}. The model represents the case temperature as TC and the ambient temperature T_{A} by a voltage source.

Applying conventional electrical circuit analysis and Ohm’s law to the model, we obtain the following equations for the heat (P_{jD} and P_{jC}) flowing through the respective drain and case branches:

P_{jD} = P_{j}/(1 + θ_{D}/θ_{C}) (3)

P_{jC} = P_{j}/(1 + θ_{C}/θ_{D}) (4)

where θ_{D} = θ_{JD} + θ_{DB} + θ_{BA} (total drain-branch thermal resistance) and θ_{C} = θ_{jC} + θ_{CA} (total case branch thermal resistance). So, total heat flow P_{j} is:

P_{j} = P_{jD} + P_{jC} (5)

Applying Ohm’s law to the combinations of thermal resistances in each branch of the diagram in the figure, we get two equations for junction temperature:

T_{j} = T_{D} + [(T_{D} – T_{A}) × θ_{jD}]/(θ_{DB} + θ_{BA}) = T_{D} + [(T_{D} – T_{A}) × θ_{jD}/θ_{DA}] (6)

T_{j} = TC + [(TC – T_{A}) × θ_{jC})]/θ_{CA} (7)

Neither of these equations contain the troublesome heat power term, P_{j}, and either one can be used to calculate the junction temperature, T_{j}, as long as the case, drain, and ambient temperatures and the thermal resistances of the package are known.

Consider a typical SO8 power MOSFET with thermal resistances θ_{CA} = 380°C/W, θ_{JC} = 18°C/W, θ_{JD} = 15°C/W, and θ_{DA} = 20°C/W (given in “Estimating TJ of SO-8 Power MOSFETs,” again). Substituting these values into Equations 3 and 4, we obtain:

P_{jD}/P_{j} = 1/[1 + (15 + 20)/(18 + 380)] = 0.92 (8)

P_{jC}/P_{j} = 0.08 (9)

In other words, 92% of the total power generated in the silicon is dissipated to ambient through the drain, and the remaining 8% is dissipated through the case.

Another important observation is that θ_{CA} is much greater than any other thermal resistance in the system, which makes the second term in Equation 7 relatively small. Assuming TC = 125°C and T_{A} = 85°C for the set of parameters given above, Equation 7 gives a junction temperature of:

T_{j} = 125 + [(125 – 85) × 18]/380 = 126.9°C (10)

This is only 1.9°C greater than the case temperature. Using Equation 6, the drain temperature is:

T_{D} = {T_{j} + [(T_{A} ×θ_{jD})/θ_{DA})]}/(1+ θ_{JD}/θ_{DA}) = {126.9 + [(85 × 15)/20)]}/(1 + 15/20) = 108.9°C (11)

So, the drain temperature is 16.1°C lower than the case temperature. This implies that for an SO8 power MOSFET with a θ_{jD} on the same order as θ_{DA} and with a θ_{CA} much greater than θ_{JC}, the drain temperature tends to be lower than the case temperature. Also, the plastic case temperature is an accurate representation of the junction temperature.

According to the measured results in “Estimating TJ of SO-8 Power MOSFETs,” the difference between T_{j} and TC for SO8 packages is typically 1°C to 3°C. If we use the same equations for other MOSFET packages, like PPAKSO8, D2PAK, DPAK, and LFPAK with low junction-to-drain thermal resistances (see the table, again), both the drain and case temperatures are close to the junction temperature. For DirectFET type MOSFETs with metal cases, θ_{JD} is even lower and, according to Equation 6, the drain temperature is an accurate representation of the junction temperature.

For a more accurate T_{j} calculation based on Equation 6, θ_{DA}, which is not available from MOSFET datasheets, can be determined. According to the model, junction-to-ambient thermal resistance, θ_{jA}, which is provided in datasheets, is a parallel combination of θD and θC resistances and θ_{DA} = θD – θ_{jD}. Applying this to the model, we can get:

θ_{DA} = θ_{jA}/(1 – θ_{jA}/θC) – θ_{jD} (12)

Taking into account that θC is approximately an order of magnitude greater than θ_{jA}, Equation 12 can be simplified as:

θ_{DA} ≈ (1.1 × θ_{jA}) – θ_{jD} (13)

Substituting Equation 13 into Equation 6, we get:

T_{j} ≈ T_{D} + [(T_{D} – T_{A}) × θ_{jD}]/[(1.1 × θ_{jA}) – θ_{jD}] (14)

where all the thermal resistance values are available from the datasheets.

We calculated the junction temperature based on parameters specified on a MOSFET’s datasheet and temperature measurements taken from the component under test conditions. A conventional measurement technique for the drain (lead) and case (package) temperature uses thermocouples placed on the package and on the lead areas.

This technique results in measured temperatures that are lower than actual temperatures for two reasons. First, the thermocouple itself works as a heatsink, cooling the device down. Second, its physical placement is critical when trying to determine the device’s hottest temperature. A more accurate temperature measurement method uses an infrared camera to determine the hottest temperature in the areas of interest (case and lead) without interfering with the heat flow.

Once the junction temperature is determined, the total power generated in the silicon, P_{j}, can be calculated:

P_{j} = (T_{j} – T_{A})/θ_{jA} (15)

where θ_{jA} is the junction-to-ambient thermal resistance available from the MOSFET’s datasheet. P_{j} also can be calculated based on Equation 3 and the junction-to-drain thermal resistance, which is also available from the datasheets:

P_{j} = [(1 + θD/θC) × (T_{j} – T_{D})]/θ_{jD} (16)

Although θD and θC are not available from the datasheets, θC is approximately one order greater than θD, so Equation 16 can be simplified as:

P_{j} ≈ [1.1 × (T_{j} – T_{D})]/θ_{jD} (17)

After P_{j} is determined, switching losses, PSW can be calculated in the conventional way:

PSW = P_{j} – Pdc – Pg = P_{j} – [Irms2 × R_{DS(on)}] – [Q × Vg × F_{SW}] (18)

where Pdc = conduction (dc) losses, Pg = gate drive losses, Irms = the rms value of the drain current, RDS(on) = the MOSFET on resistance, Q = total gate charge, Vg = peak gate voltage, and FSW = switching frequency. For a square-wave drain current with peak current of Ipk and duty cycle D, Irms2 = I_{pk}^{2} × D.

This analysis of the modified thermal model of the MOSFET demonstrates that the hottest spot on the lead and package areas of a power MOSFET is typically a couple of degrees Celsius less than the junction temperature. This hot-spot temperature can be accurately measured by an infrared camera without affecting the device’s heat flow, and the result can be used with the thermal resistance values found in the datasheet to calculate the MOSFET’s junction temperature. Finally, the total power generated inside the silicon and the switching losses can be calculated.