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Power-Management IC Reduces Thermal Stress

Sept. 19, 2013
Thanks to a two-wire feedback interface, AMS’ AS3721 power-management IC (PMIC) can be placed far apart from the applications processor in a mobile phone or tablet. As a result, these two hotspots can be physically separated, which cuts down on thermal stress.

Thanks to a two-wire feedback interface, AMS’ AS3721 power-management IC (PMIC) can be placed far apart from the applications processor in a mobile phone or tablet. As a result, these two hotspots can be physically separated, which cuts down on thermal stress.

The device enables a compact remote feedback path from the processor to the IC’s integrated dc-dc controllers. A patent-pending design innovation reduced the required wires for the feedback interface to the AS3721 from the typical four or five wires to two (one control signal, one temperature signal). With fewer traces connecting the PMIC to the point-of-load power stages, the two devices can be placed far apart in space-constrained board layouts.

The high-acceleration feedback loop carried over the AS3721’s two-wire interface keeps the processor within its safe operating voltage even when supplying extremely fast-changing loads. The system’s voltage drop during a step up from 0.5 A to 5 A in burst mode (40-µF output capacitor; 1.0-V output voltage) is 32 mV (typical).

The AS3721 features four dc-dc step-down regulators supplying 4, 2, and 1.5 A; three dc-dc step-down controllers rated for 5, 10, and 20 A; 12 digital LDOs; a real-time clock; a supervisor circuit; GPIOs; a general-purpose ADC; and a one-time programmable boot sequence. The device’s 8- by 8-mm BGA package has a 0.5-mm pitch.

AMS

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