This article describes how LTspice simulations can be used to account for the effect of voltage dependence, or dc bias, caused by the use of ceramic capacitors with smaller and smaller case sizes. Demand for smaller electronic devices with an increasing number of features, combined with reduced current consumption, calls for size constraints on components, including multi-layer ceramic capacitors (MLCCs). As a result, the effect of the voltage dependence, or dc bias, also is being pushed into focus.
Miniaturization of ceramic capacitors requires higher capacitance values in an increasingly smaller space. To that end, materials with high permittivities (ε) and increasingly thin dielectric insulating layers are being implemented, making it now possible to produce high-quality ceramic layers on an industrial scale.