SiC Technology Advances At Wafer and Device Levels

May 30, 2007
Recent silicon carbide semiconductor developments reveal how the technology is progressing through improvements in material and through the development of new power components.

Recent silicon carbide (SiC) semiconductor developments reveal how the technology is progressing through improvements in material and through the development of new power components. On the material side, Cree has taken another step forward in pushing SiC into the mainstream by demonstrating 4-inch SiC wafers with zero micropipes. Meanwhile at the device level, TranSiC is now sampling SiC bipolar transistors.

Cree (www.cree.com) announced recently that it has achieved another milestone in the development of silicon carbide (SiC) technology with the demo of 4-inch, zero-micropipe (ZMP), n-type SiC substrates. Micropipes, common crystalline defects in SiC, can not only decrease the number of usable electronic devices produced per wafer, but can also affect performance parameters of each device produced. Until now, these defects have been present in nearly all SiC wafers manufactured and sold by commercial substrate vendors.

Through previous research and development efforts at Cree, partially funded by the U.S. Army and DARPA, the density of these defects has been dramatically reduced. Cree’s current accomplishment shows that it is possible to eliminate these defects in large-area wafers as well.

“We expect that ZMP technology can significantly improve device yields, expand the range of products that can be designed and produced, and enable manufacturing at higher-volume levels than had been possible before,” states Cengiz Balkas, Ph.D., Cree vice president and general manager for materials.

At PCIM Europe conference and exhibition last week, TranSiC (www.transic.com) of Kista, Sweden presented specifications for its BitSiC-1206 SiC NPN bipolar junction transistor as well as some details on possible future device developments. Meant to replace silicon IGBTs, the BitSiC-1206 enables lower losses at high frequencies and handles higher temperatures than IGBTs. The SiC transistor operates at junction temperatures up to 250ºC.

The BitSiC-1206 is rated for a VCEO of 1200 V and an IC of 6 A continuous or up to 35 A peak. According to Bo Hammarlund, CEO of TranSiC, SiC bipolars could be developed with higher current ratings, perhaps 50 A, in the future as SiC materials improve further and wafer costs drop.

The BitSiC-1206, which is now sampling, will be available in a TO-220 package, as a multichip module on a DBC substrate, or in die form. A short version of the datasheet is available at TranSic’s website. For further details, write [email protected].

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