Dual-Cool Package Technology Enables Power Dissipation Through Top of Package

Nov. 10, 2010
To meet the needs for high current capability, high efficiency and smaller form factors, Fairchild Semiconductor developed the Dual Cool packaging for MOSFETs.

To meet the needs for high current capability, high efficiency and smaller form factors, Fairchild Semiconductor developed the Dual Cool(tm) packaging for MOSFETs. The Dual Cool package is a top-side cooling PQFN device that incorporates new packaging technology that enables additional power dissipation through the top of the package.

Dual Cool packaging features an exposed heat slug that delivers a significant reduction in thermal resistance from junction to top of case, resulting in more than 60 percent higher power dissipation capability than standard PQFN packaging when a heat sink is mounted. Additionally, MOSFETs in the Dual Cool package are designed with Fairchild's proprietary PowerTrench® process technology, that enables lower RDS(ON) and higher load currents in smaller package sizes.

Unlike competitive top-side cooling solutions, these devices are currently available in both Power33 (3.3mm x 3.3mm) and Power56 (5mm x 6mm) Dual Cool packaging options. Maintaining the same industry-standard PQFN footprint, the Dual Cool package allows power engineers to rapidly qualify MOSFETs in Dual Cool packaging, gaining increased thermal efficiency without having to adjust for non-standard packages.

Devices currently available in the Dual Cool package include the FDMS2504SDC, FDMS2506SDC, FDMS2508SDC, FDMS2510SDC (5mm x 6mm footprint) and the FDMC7660DC (3.3mm x 3.3mm footprint). These devices are ideal as synchronous rectifying MOSFETs for DC-DC converters, telecom secondary side rectification and high end server/workstation applications. Fairchild's Dual Cool packaged MOSFETs' top-side cooling and an ultra-low junction temperature (R?JA) enable increased thermal efficiency. MOSFETs in the Dual Cool package can be used with or without a heat sink.

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