Maintaining Digital Signal Integrity
see “Logic Analyzers Probe for the Truth.” A logic analyzer captures and displays signal timing. In contrast to a DSO, amplitude variations between threshold crossings are relatively unimportant. However, amplitude distortion can and does translate into timing errors.The great strength of a logic analyzer is the insight it provides about the timing relationships among signals on many channels. Unfortunately, each channel is slightly different which creates a channel-to-channel timing skew. In some logic analyzers, skew can be minimized, but there will be a residual value to work around. General-purpose logic analyzers such as the Tektronix TLA 700 or Agilent Technologies HP 16600 have about 1 ns of total skew among all the channels.Skew is important because it sets a reference level for channel-to-channel timing uncertainty. But within a single channel, probe performance largely determines signal-distortion-related timing variations.Although the probe wires contribute a small amount of inductance, the R0, R1, and the shunt C dominate the equivalent circuit of a logic-analyzer probe (Figure 1, below). The load presented to the digital circuit being probed consists of a small current-limiting and damping resistance placed in series with the input impedance of the logic-analyzer probe pod.Figure 1
R0 typically is much smaller than R1, and it is the combination of R0 and C that determines the high-frequency input characteristics of the probe, not R1 and C. On the other hand, at relatively low frequencies, the shunt C has little effect, and the input impedance of the circuit appears almost entirely resistive with value R0 + R1. See Figure 2. R0 includes DUT output impedance, assumed to be zero in this discussion.Because logic analyzers often are used at high speeds, it's important to consider the behavior of the probe above the lower 3-dB frequency-where C and R0 dominate. In this frequency region, voltage division and phase shifting distort the signal at the node where the three equivalent, lumped components join. This is the voltage presented to the logic analyzer.Agilent Technologies and Tektronix, the market leaders in high-performance logic analyzers, have taken different approaches to the design of their probes, which result in distinctive performance characteristics. Figures 3a and 3b show the voltage at the R0-R1-C node for the Tektronix TLA 700 probe and the Agilent Technologies HP 16600/700 general-purpose probe when driven by 200-MHz data. The higher values of capacitance and R0 in the Agilent Technologies wholly passive design cause the signal amplitude to be reduced by about 20%. Also, signal transitions have been delayed and slowed. However, the delay will be nearly the same for all channels, so the fact that the signal transitions have been delayed is relatively unimportant in itself. In contrast, the Tektronix probe uses active attenuator technology with lower C and R0 values. The input waveform can reach its full amplitude, and the transitions are slowed and delayed much less. The slower slew rate of the Agilent Technologies probe response will allow signal noise to translate into greater timing jitter than the faster Tektronix probe, assuming ideal comparators. But how much more? Assume there is 50 mV of peak noise on a 1-V signal, 100 mVpk-pk or ??5%. An ideal comparator will switch state at the instant the input voltage exceeds the threshold voltage by any amount; in practice, when the input voltage and threshold voltage are equal. As a result, the worst-case effect of the noise would cause the comparator to switch too soon when the input is 50 mV below the threshold (noise is adding to the input) or too late when the input should be 50 mV above the threshold (noise is subtracting from the input). The timing errors caused by the noise depend on the input slew rate. At the R0-R1-C node, if the slew rate were 1 V/ns, then the ??50-mV switching uncertainty translates into ??50-ps timing uncertainty. Although they provide high timing resolution, the logic analyzers that use the Agilent Technologies and Tektronix probes (Figure 2) can only recognize data pulses wider than 2 ns or 3 ns. In comparison, ??50-ps uncertainty is a small amount. When the data rate is high enough compared to probe bandwidth that the probe cannot track full amplitude data excursions, data-dependent timing jitter is introduced. Figure 3a shows that the peaks of the Agilent Technologies probe output vary in height depending on the previous data states. Although hard to see in the figure, the threshold crossing times also vary slightly. To get faster response from a wholly passive probe, shunt capacitance C must be smaller. A smaller C presents less load to the DUT at high frequencies. Whether or not a probe is intrusive depends upon your definition. But one measure of acceptable loading compares probe current to the current drawn by a logic input. Does the probe appear as a fanout of one or more for the logic family being probed? Can your DUT drive an additional fanout load, and how much will the load slow down the DUT signal transitions? These kinds of considerations determine whether or not a probe is intrusive. What conclusion can be reached about the two types of probes? The TLA 700 probe maintains better signal integrity and introduces less additional timing uncertainty than the Agilent Technologies general-purpose probe. But, the differences between the two probes really are small when compared with the timing resolution of either analyzer. The HP 16517A/518A high-speed timing module supports up to 4-GHz asynchronous timing and up to 1-GHz state acquisition. The Tektronix TLA 700 with MagniVuT technology acquires all signals asynchronously at a 2-GHz rate. Even at their highest speeds, the smallest time interval for these analyzers is several hundred picoseconds, far greater than the noise and data-dependent errors associated with low passive-probe bandwidth. Also, a different probe with much lower shunt C is used with the HP 16517A/518A module, reducing these errors even more. The conclusion: Probe characteristics are very important to the correct operation of high-speed logic analyzers. However, because the probe-related timing uncertainties described here are much less than a timing clock period, they really are insignificant. If you consider that the resolution of a measuring instrument should be several times greater than the precision of the value being measured, a 2-GHz or 4-GHz timing-resolution logic analyzer should be used to measure events a few nanoseconds long. Probe-induced errors on the order of 100 ps are not desirable but neither are they relevant. For more information on logic analyzers,
see “Logic Analyzers Probe for the Truth.”