EDA tools key to exploiting Moore's Law

Santa Clara, CA. EDA and methodology development constituted the focus of a DesignCon Tuesday keynote address by Jonah Alben, senior vice president of engineering at NVIDIA. To the layman, he said, technology advances may seem to be driven solely by Moore's Law, but EDA plays a key role as well. If we were still using the design tools of 30 years ago, he said, we would not be able to make use of all the transistors Moore's Law lets us build.

Yet it might not just be the laymen that put too much emphasis on Moore's Law. “Despite the value of EDA,” Alben said, “companies tend to under-invest in it, and that includes my company as well.” That's partly due to complacency, he said, with companies believing that since the current tools got the last chips out they will get the next one out as well. That line of reasoning can eventually lead over a cliff, and Alben suggested engineers don’t perhaps complain enough—they should learn to complain more about the limitations of their existing tools.

Alben cited several rules for methodology investment, including defend your productivity, define a long-term investment strategy, choose important near-term investment goals, focus on improving methodology with every project, allocate a budget for methodology staffing, involve product engineers, and “keep the lights on.” With respect to this last point, he said, companies need to realize that they can't do a hard cutover from one flow to another—there will be a period of double investment to avoid a painful gap.

Key areas of methodology focus, Alben said, include logic simulation and visualization, signal-integrity and electromagnetic analysis, Spice simulation, and computational lithography. His particular focus is logic in the era of multicore CPUs and GPUs. A 4X bigger design, he said, tends to extend simulation time by a factor of 3.4X. He reported favorable results running the Synopsys VCS tool on an NVIDIA K10 accelerator, with a 3X speedup for two jobs running on one K10.

Alben also reported favorable results for ATPG gate simulation. A methodology employing Rocketick technology and a K10 accelerator resulted in an average 17.1X speedup. Such innovations will need to continue to keep pace with Moore's Law.

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