As electronics technology has evolved toward increasing complexity, so too have test techniques, and you can expect rapid change as the Internet of Things (IoT) proliferates. In the age of what Aart de Geus, chairman and co-CEO of Synopsys, calls “Smart Everything,” we no longer will be able to isolate a “device under test” (DUT) or even “equipment under test” (EUT)—we will have to evaluate “things under test” in the context of other, interconnected things under test, and those things, suggested de Geus in a keynote address at the International Test Conference in October in Seattle, will include humans.
He traced the evolution of semiconductor test, including ATPG and scan testing, memory BIST (bringing test smarts on-chip), test-vector compression, core-based IEEE 1500 SoC test, and memory self-repair—which he described as an avant-garde approach that builds in test as well as a fix.
Of course, testing individual semiconductor devices will continue to be necessary, and ITC participants exhibited many products for that task. Marvin Test Solutions, for example, showcased an updated PXI-based semiconductor test system with per-pin test capability. On the EDA front, Synopsys introduced two initiatives: defect-detection enhancements in TetraMAX ATPG through slack-based cell-aware test capability and a new STAR (self-test and repair) Memory System for embedded flash, which is increasingly deployed in automotive, wearable, IoT, and other applications.
Moving beyond a specific DUT focus, ASSET InterTech highlighted interoperability between ASSET tools and Mentor Graphics’ Tessent products for the IEEE P1687 Internal JTAG (IJTAG) embedded instrumentation standard. The two companies’ collaboration will allow engineers to debug issues in a complex SoC or within the context of a circuit board on which the chip has been deployed.
Software, too, is an important part of things under test, and software test for the 21st century was the focus of an ITC keynote address by Patrice Godefroid, a principal researcher at Microsoft. He noted that practical software-test tools are becoming available and described SAGE (Scalable Automated Guided Execution) and its use in hunting for million-dollar bugs. Software security bugs, he said, can be very expensive, and it’s important to find these bugs as early as possible.
Sophisticated software and the chips it runs on will open up new opportunities. “If we can continue to deliver smaller transistors, incredible applications are possible,” de Geus said in his keynote. He added that video (with its bandwidth demands) is a gift to our field. So, too, will be the ubiquitous sensors and actuators that make up “Smart Everything.” There are potential downsides, he said, envisioning a police report stating, “The perp came in through the toaster.” Let’s hope that software-test tools are up to finding security bugs in smart appliances.
Soon, de Geus said, humans will be part of the things under test. Of course, people have long been “under test” in doctors’ offices, for example, and nano-bio technology is making possible portable and wearable products that can monitor human health and performance continuously in real time, as I discuss in “NBMC tackles human performance monitoring, medical diagnostics” on page 23. But in these cases, electronic and nanomaterial devices are testing biological conditions and markers. What de Geus is envisioning is the era of the “smart brain,” with the “thing under test” being not just electronic or biological but a combination of the two. For example, a paraplegic equipped with sensors that can pick up brain waves can control an artificial hand. From a test perspective, de Geus said, controllability and observability apply not just to the electronics, but to the DUT as a whole—and that includes the human.
Rick Nelson, Executive Editor
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