Santa Clara, CA. Computer Simulation Technology AG (CST) demonstrated new features for EDA simulation in CST STUDIO SUITE 2015 at DesignCon 2015.
The company said electromagnetic simulation can be of great benefit to electronic engineers interested in signal integrity (SI), power integrity (PI), and electromagnetic compatibility (EMC) on PCBs and packages by making it possible to analyze the performance of virtual prototypes before tape-out.
In order to be most effective in the EDA workflow, simulation should be fast and accurate and offer a more detailed understanding of the causes of SI/PI and EMC issues than measurement alone can provide. For this reason, CST is introducing several new features in CST STUDIO SUITE 2015 that have been developed to accelerate the simulation process and make it easier for users to analyze and optimize their designs.
Before any simulation can begin, a mesh needs to be created to discretize the structure. CST STUDIO SUITE 2015 introduces a new tetrahedral meshing algorithm that is optimized for printed electronics. This algorithm exploits knowledge of the general structure of imported models such as PCBs and packages to assemble and mesh them much faster. For frequency-domain simulations of complex packages, this can reduce the total meshing time sevenfold.
Another significant new feature is the introduction of Pareto frontier optimization for decoupling capacitors. The placement of decoupling capacitors can significantly improve the PI performance of a PCB, but also increases the cost of fabrication. With Pareto frontier optimization, the software can automatically balance the two competing design goals and find the combination of capacitors that minimizes the cost while meeting the design requirements.
Alongside these improvements, CST STUDIO SUITE 2015 also includes a range of other performance and productivity improvements developed to make the integration of simulation into the EDA workflow easier and more powerful.
