GOEPEL I/O module enhances testability of assemblies
GOEPEL electronics is augmenting its SCANFLEX JTAG/boundary-scan hardware platform with the SFX-5296LX, a next-generation mixed-signal I/O module, which make even non-scannable partitions testable through boundary scan. It can test an assembly with just one boundary-scan IC.
The SFX-5296LX is equipped with diverse dynamic test resources for each channel, such as a frequency counter, an event detector, an arbitrary waveform generator, and a digitizer. It includes a total of 96 single-ended channels and extends boundary-scan test to non-scannable components such as connectors, clusters, or analog interfaces. To increase flexibility, each channel can be configured as input, output, and 3-state and can be easily programmed using many available parameters. These include switchable pull up/pull down or selectable slope steepness for the driver.
The new SFX-5296LX uses the parallel I/O bus and therefore enables much faster data transfer than with serial, via TAP-driven I/O modules. Based on the test resources available per channel, both static and dynamic at-speed tests are feasible, allowing a significant improvement of the structural fault coverage along with more flexible test strategies. Thereby only one SFX slot is needed. To increase the number of channels, several modules can be operated simultaneously.
The module is based on the ASIC CION-LX, a multifunctional mixed-signal tester on chip (ToC) developed by GOEPEL electronics. The boundary-scan software SYSTEM CASCON allows full automation of the entire project development, from integration of the module into the tester configuration, to automatic test generation and automatic error diagnosis.
About the Author
Rick Nelson
Contributing Editor
Rick is currently Contributing Technical Editor. He was Executive Editor for EE in 2011-2018. Previously he served on several publications, including EDN and Vision Systems Design, and has received awards for signed editorials from the American Society of Business Publication Editors. He began as a design engineer at General Electric and Litton Industries and earned a BSEE degree from Penn State.